![Brian Swetland](/assets/img/avatar_default.png)
This patch adds driver for HTC Dream camera. I guess driver is slightly higher quality than usual for staging/ , but it is fairly big and I don't feel like doing all the cleanups myself. Also some parts can probably be removed, as they did not end up in shipping hardware.. Signed-off-by: Pavel Machek <pavel@ucw.cz> Cc: Brian Swetland <swetland@google.com> Cc: Iliyan Malchev <ibm@android.com> Cc: San Mehat <san@android.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
896 lines
20 KiB
C
896 lines
20 KiB
C
/*
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* Copyright (C) 2008-2009 QUALCOMM Incorporated.
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*/
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#ifndef __MSM_VFE8X_H__
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#define __MSM_VFE8X_H__
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#define TRUE 1
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#define FALSE 0
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#define boolean uint8_t
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enum VFE_STATE {
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VFE_STATE_IDLE,
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VFE_STATE_ACTIVE
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};
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enum vfe_cmd_id {
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/*
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*Important! Command_ID are arranged in order.
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*Don't change!*/
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VFE_CMD_ID_START,
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VFE_CMD_ID_RESET,
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/* bus and camif config */
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VFE_CMD_ID_AXI_INPUT_CONFIG,
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VFE_CMD_ID_CAMIF_CONFIG,
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VFE_CMD_ID_AXI_OUTPUT_CONFIG,
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/* module config */
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VFE_CMD_ID_BLACK_LEVEL_CONFIG,
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VFE_CMD_ID_ROLL_OFF_CONFIG,
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VFE_CMD_ID_DEMUX_CHANNEL_GAIN_CONFIG,
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VFE_CMD_ID_DEMOSAIC_CONFIG,
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VFE_CMD_ID_FOV_CROP_CONFIG,
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VFE_CMD_ID_MAIN_SCALER_CONFIG,
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VFE_CMD_ID_WHITE_BALANCE_CONFIG,
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VFE_CMD_ID_COLOR_CORRECTION_CONFIG,
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VFE_CMD_ID_LA_CONFIG,
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VFE_CMD_ID_RGB_GAMMA_CONFIG,
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VFE_CMD_ID_CHROMA_ENHAN_CONFIG,
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VFE_CMD_ID_CHROMA_SUPPRESSION_CONFIG,
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VFE_CMD_ID_ASF_CONFIG,
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VFE_CMD_ID_SCALER2Y_CONFIG,
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VFE_CMD_ID_SCALER2CbCr_CONFIG,
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VFE_CMD_ID_CHROMA_SUBSAMPLE_CONFIG,
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VFE_CMD_ID_FRAME_SKIP_CONFIG,
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VFE_CMD_ID_OUTPUT_CLAMP_CONFIG,
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/* test gen */
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VFE_CMD_ID_TEST_GEN_START,
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VFE_CMD_ID_UPDATE,
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/* ackownledge from upper layer */
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VFE_CMD_ID_OUTPUT1_ACK,
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VFE_CMD_ID_OUTPUT2_ACK,
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VFE_CMD_ID_EPOCH1_ACK,
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VFE_CMD_ID_EPOCH2_ACK,
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VFE_CMD_ID_STATS_AUTOFOCUS_ACK,
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VFE_CMD_ID_STATS_WB_EXP_ACK,
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/* module update commands */
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VFE_CMD_ID_BLACK_LEVEL_UPDATE,
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VFE_CMD_ID_DEMUX_CHANNEL_GAIN_UPDATE,
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VFE_CMD_ID_DEMOSAIC_BPC_UPDATE,
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VFE_CMD_ID_DEMOSAIC_ABF_UPDATE,
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VFE_CMD_ID_FOV_CROP_UPDATE,
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VFE_CMD_ID_WHITE_BALANCE_UPDATE,
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VFE_CMD_ID_COLOR_CORRECTION_UPDATE,
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VFE_CMD_ID_LA_UPDATE,
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VFE_CMD_ID_RGB_GAMMA_UPDATE,
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VFE_CMD_ID_CHROMA_ENHAN_UPDATE,
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VFE_CMD_ID_CHROMA_SUPPRESSION_UPDATE,
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VFE_CMD_ID_MAIN_SCALER_UPDATE,
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VFE_CMD_ID_SCALER2CbCr_UPDATE,
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VFE_CMD_ID_SCALER2Y_UPDATE,
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VFE_CMD_ID_ASF_UPDATE,
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VFE_CMD_ID_FRAME_SKIP_UPDATE,
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VFE_CMD_ID_CAMIF_FRAME_UPDATE,
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/* stats update commands */
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VFE_CMD_ID_STATS_AUTOFOCUS_UPDATE,
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VFE_CMD_ID_STATS_WB_EXP_UPDATE,
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/* control of start, stop, update, etc... */
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VFE_CMD_ID_STOP,
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VFE_CMD_ID_GET_HW_VERSION,
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/* stats */
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VFE_CMD_ID_STATS_SETTING,
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VFE_CMD_ID_STATS_AUTOFOCUS_START,
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VFE_CMD_ID_STATS_AUTOFOCUS_STOP,
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VFE_CMD_ID_STATS_WB_EXP_START,
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VFE_CMD_ID_STATS_WB_EXP_STOP,
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VFE_CMD_ID_ASYNC_TIMER_SETTING,
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/* max id */
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VFE_CMD_ID_MAX
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};
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struct vfe_cmd_hw_version {
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uint32_t minorVersion;
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uint32_t majorVersion;
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uint32_t coreVersion;
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};
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enum VFE_CAMIF_SYNC_EDGE {
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VFE_CAMIF_SYNC_EDGE_ActiveHigh,
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VFE_CAMIF_SYNC_EDGE_ActiveLow
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};
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enum VFE_CAMIF_SYNC_MODE {
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VFE_CAMIF_SYNC_MODE_APS,
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VFE_CAMIF_SYNC_MODE_EFS,
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VFE_CAMIF_SYNC_MODE_ELS,
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VFE_CAMIF_SYNC_MODE_ILLEGAL
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};
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struct vfe_cmds_camif_efs {
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uint8_t efsendofline;
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uint8_t efsstartofline;
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uint8_t efsendofframe;
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uint8_t efsstartofframe;
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};
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struct vfe_cmds_camif_frame {
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uint16_t pixelsPerLine;
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uint16_t linesPerFrame;
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};
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struct vfe_cmds_camif_window {
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uint16_t firstpixel;
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uint16_t lastpixel;
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uint16_t firstline;
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uint16_t lastline;
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};
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enum CAMIF_SUBSAMPLE_FRAME_SKIP {
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CAMIF_SUBSAMPLE_FRAME_SKIP_0,
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CAMIF_SUBSAMPLE_FRAME_SKIP_AllFrames,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_2Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_3Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_4Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_5Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_6Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_7Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_8Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_9Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_10Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_11Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_12Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_13Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_14Frame,
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CAMIF_SUBSAMPLE_FRAME_SKIP_ONE_OUT_OF_EVERY_15Frame
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};
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struct vfe_cmds_camif_subsample {
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uint16_t pixelskipmask;
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uint16_t lineskipmask;
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enum CAMIF_SUBSAMPLE_FRAME_SKIP frameskip;
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uint8_t frameskipmode;
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uint8_t pixelskipwrap;
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};
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struct vfe_cmds_camif_epoch {
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uint8_t enable;
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uint16_t lineindex;
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};
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struct vfe_cmds_camif_cfg {
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enum VFE_CAMIF_SYNC_EDGE vSyncEdge;
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enum VFE_CAMIF_SYNC_EDGE hSyncEdge;
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enum VFE_CAMIF_SYNC_MODE syncMode;
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uint8_t vfeSubSampleEnable;
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uint8_t busSubSampleEnable;
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uint8_t irqSubSampleEnable;
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uint8_t binningEnable;
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uint8_t misrEnable;
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};
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struct vfe_cmd_camif_config {
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struct vfe_cmds_camif_cfg camifConfig;
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struct vfe_cmds_camif_efs EFS;
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struct vfe_cmds_camif_frame frame;
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struct vfe_cmds_camif_window window;
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struct vfe_cmds_camif_subsample subsample;
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struct vfe_cmds_camif_epoch epoch1;
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struct vfe_cmds_camif_epoch epoch2;
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};
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enum VFE_AXI_OUTPUT_MODE {
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VFE_AXI_OUTPUT_MODE_Output1,
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VFE_AXI_OUTPUT_MODE_Output2,
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VFE_AXI_OUTPUT_MODE_Output1AndOutput2,
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VFE_AXI_OUTPUT_MODE_CAMIFToAXIViaOutput2,
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VFE_AXI_OUTPUT_MODE_Output2AndCAMIFToAXIViaOutput1,
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VFE_AXI_OUTPUT_MODE_Output1AndCAMIFToAXIViaOutput2,
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VFE_AXI_LAST_OUTPUT_MODE_ENUM
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};
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enum VFE_RAW_WR_PATH_SEL {
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VFE_RAW_OUTPUT_DISABLED,
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VFE_RAW_OUTPUT_ENC_CBCR_PATH,
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VFE_RAW_OUTPUT_VIEW_CBCR_PATH,
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VFE_RAW_OUTPUT_PATH_INVALID
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};
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enum VFE_RAW_PIXEL_DATA_SIZE {
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VFE_RAW_PIXEL_DATA_SIZE_8BIT,
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VFE_RAW_PIXEL_DATA_SIZE_10BIT,
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VFE_RAW_PIXEL_DATA_SIZE_12BIT,
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};
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#define VFE_AXI_OUTPUT_BURST_LENGTH 4
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#define VFE_MAX_NUM_FRAGMENTS_PER_FRAME 4
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#define VFE_AXI_OUTPUT_CFG_FRAME_COUNT 3
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struct vfe_cmds_axi_out_per_component {
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uint16_t imageWidth;
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uint16_t imageHeight;
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uint16_t outRowCount;
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uint16_t outRowIncrement;
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uint32_t outFragments[VFE_AXI_OUTPUT_CFG_FRAME_COUNT]
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[VFE_MAX_NUM_FRAGMENTS_PER_FRAME];
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};
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struct vfe_cmds_axi_per_output_path {
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uint8_t fragmentCount;
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struct vfe_cmds_axi_out_per_component outputY;
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struct vfe_cmds_axi_out_per_component outputCbcr;
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};
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enum VFE_AXI_BURST_LENGTH {
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VFE_AXI_BURST_LENGTH_IS_2 = 2,
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VFE_AXI_BURST_LENGTH_IS_4 = 4,
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VFE_AXI_BURST_LENGTH_IS_8 = 8,
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VFE_AXI_BURST_LENGTH_IS_16 = 16
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};
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struct vfe_cmd_axi_output_config {
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enum VFE_AXI_BURST_LENGTH burstLength;
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enum VFE_AXI_OUTPUT_MODE outputMode;
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enum VFE_RAW_PIXEL_DATA_SIZE outputDataSize;
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struct vfe_cmds_axi_per_output_path output1;
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struct vfe_cmds_axi_per_output_path output2;
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};
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struct vfe_cmd_fov_crop_config {
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uint8_t enable;
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uint16_t firstPixel;
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uint16_t lastPixel;
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uint16_t firstLine;
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uint16_t lastLine;
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};
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struct vfe_cmds_main_scaler_stripe_init {
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uint16_t MNCounterInit;
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uint16_t phaseInit;
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};
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struct vfe_cmds_scaler_one_dimension {
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uint8_t enable;
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uint16_t inputSize;
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uint16_t outputSize;
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uint32_t phaseMultiplicationFactor;
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uint8_t interpolationResolution;
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};
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struct vfe_cmd_main_scaler_config {
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uint8_t enable;
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struct vfe_cmds_scaler_one_dimension hconfig;
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struct vfe_cmds_scaler_one_dimension vconfig;
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struct vfe_cmds_main_scaler_stripe_init MNInitH;
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struct vfe_cmds_main_scaler_stripe_init MNInitV;
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};
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struct vfe_cmd_scaler2_config {
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uint8_t enable;
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struct vfe_cmds_scaler_one_dimension hconfig;
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struct vfe_cmds_scaler_one_dimension vconfig;
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};
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struct vfe_cmd_frame_skip_config {
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uint8_t output1Period;
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uint32_t output1Pattern;
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uint8_t output2Period;
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uint32_t output2Pattern;
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};
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struct vfe_cmd_frame_skip_update {
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uint32_t output1Pattern;
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uint32_t output2Pattern;
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};
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struct vfe_cmd_output_clamp_config {
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uint8_t minCh0;
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uint8_t minCh1;
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uint8_t minCh2;
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uint8_t maxCh0;
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uint8_t maxCh1;
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uint8_t maxCh2;
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};
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struct vfe_cmd_chroma_subsample_config {
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uint8_t enable;
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uint8_t cropEnable;
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uint8_t vsubSampleEnable;
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uint8_t hsubSampleEnable;
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uint8_t vCosited;
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uint8_t hCosited;
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uint8_t vCositedPhase;
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uint8_t hCositedPhase;
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uint16_t cropWidthFirstPixel;
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uint16_t cropWidthLastPixel;
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uint16_t cropHeightFirstLine;
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uint16_t cropHeightLastLine;
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};
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enum VFE_START_INPUT_SOURCE {
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VFE_START_INPUT_SOURCE_CAMIF,
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VFE_START_INPUT_SOURCE_TESTGEN,
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VFE_START_INPUT_SOURCE_AXI,
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VFE_START_INPUT_SOURCE_INVALID
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};
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enum VFE_START_OPERATION_MODE {
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VFE_START_OPERATION_MODE_CONTINUOUS,
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VFE_START_OPERATION_MODE_SNAPSHOT
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};
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enum VFE_START_PIXEL_PATTERN {
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VFE_BAYER_RGRGRG,
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VFE_BAYER_GRGRGR,
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VFE_BAYER_BGBGBG,
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VFE_BAYER_GBGBGB,
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VFE_YUV_YCbYCr,
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VFE_YUV_YCrYCb,
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VFE_YUV_CbYCrY,
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VFE_YUV_CrYCbY
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};
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enum VFE_BUS_RD_INPUT_PIXEL_PATTERN {
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VFE_BAYER_RAW,
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VFE_YUV_INTERLEAVED,
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VFE_YUV_PSEUDO_PLANAR_Y,
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VFE_YUV_PSEUDO_PLANAR_CBCR
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};
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enum VFE_YUV_INPUT_COSITING_MODE {
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VFE_YUV_COSITED,
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VFE_YUV_INTERPOLATED
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};
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struct vfe_cmd_start {
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enum VFE_START_INPUT_SOURCE inputSource;
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enum VFE_START_OPERATION_MODE operationMode;
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uint8_t snapshotCount;
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enum VFE_START_PIXEL_PATTERN pixel;
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enum VFE_YUV_INPUT_COSITING_MODE yuvInputCositingMode;
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};
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struct vfe_cmd_output_ack {
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uint32_t ybufaddr[VFE_MAX_NUM_FRAGMENTS_PER_FRAME];
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uint32_t chromabufaddr[VFE_MAX_NUM_FRAGMENTS_PER_FRAME];
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};
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#define VFE_STATS_BUFFER_COUNT 3
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struct vfe_cmd_stats_setting {
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uint16_t frameHDimension;
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uint16_t frameVDimension;
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uint8_t afBusPrioritySelection;
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uint8_t afBusPriority;
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uint8_t awbBusPrioritySelection;
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uint8_t awbBusPriority;
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uint8_t histBusPrioritySelection;
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uint8_t histBusPriority;
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uint32_t afBuffer[VFE_STATS_BUFFER_COUNT];
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uint32_t awbBuffer[VFE_STATS_BUFFER_COUNT];
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uint32_t histBuffer[VFE_STATS_BUFFER_COUNT];
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};
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struct vfe_cmd_stats_af_start {
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uint8_t enable;
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uint8_t windowMode;
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uint16_t windowHOffset;
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uint16_t windowVOffset;
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uint16_t windowWidth;
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uint16_t windowHeight;
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uint8_t gridForMultiWindows[16];
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uint8_t metricSelection;
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int16_t metricMax;
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int8_t highPassCoef[7];
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int8_t bufferHeader;
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};
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struct vfe_cmd_stats_af_update {
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uint8_t windowMode;
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uint16_t windowHOffset;
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uint16_t windowVOffset;
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uint16_t windowWidth;
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uint16_t windowHeight;
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};
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struct vfe_cmd_stats_wb_exp_start {
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uint8_t enable;
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uint8_t wbExpRegions;
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uint8_t wbExpSubRegion;
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uint8_t awbYMin;
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uint8_t awbYMax;
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int8_t awbMCFG[4];
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int16_t awbCCFG[4];
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int8_t axwHeader;
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};
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struct vfe_cmd_stats_wb_exp_update {
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uint8_t wbExpRegions;
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uint8_t wbExpSubRegion;
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int8_t awbYMin;
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int8_t awbYMax;
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int8_t awbMCFG[4];
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int16_t awbCCFG[4];
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};
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struct vfe_cmd_stats_af_ack {
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uint32_t nextAFOutputBufferAddr;
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};
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struct vfe_cmd_stats_wb_exp_ack {
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uint32_t nextWbExpOutputBufferAddr;
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};
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struct vfe_cmd_black_level_config {
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uint8_t enable;
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uint16_t evenEvenAdjustment;
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uint16_t evenOddAdjustment;
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uint16_t oddEvenAdjustment;
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uint16_t oddOddAdjustment;
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};
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/* 13*1 */
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#define VFE_ROLL_OFF_INIT_TABLE_SIZE 13
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/* 13*16 */
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#define VFE_ROLL_OFF_DELTA_TABLE_SIZE 208
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struct vfe_cmd_roll_off_config {
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uint8_t enable;
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uint16_t gridWidth;
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uint16_t gridHeight;
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uint16_t yDelta;
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uint8_t gridXIndex;
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uint8_t gridYIndex;
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uint16_t gridPixelXIndex;
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uint16_t gridPixelYIndex;
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uint16_t yDeltaAccum;
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uint16_t initTableR[VFE_ROLL_OFF_INIT_TABLE_SIZE];
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uint16_t initTableGr[VFE_ROLL_OFF_INIT_TABLE_SIZE];
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uint16_t initTableB[VFE_ROLL_OFF_INIT_TABLE_SIZE];
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uint16_t initTableGb[VFE_ROLL_OFF_INIT_TABLE_SIZE];
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int16_t deltaTableR[VFE_ROLL_OFF_DELTA_TABLE_SIZE];
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int16_t deltaTableGr[VFE_ROLL_OFF_DELTA_TABLE_SIZE];
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int16_t deltaTableB[VFE_ROLL_OFF_DELTA_TABLE_SIZE];
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int16_t deltaTableGb[VFE_ROLL_OFF_DELTA_TABLE_SIZE];
|
|
};
|
|
|
|
struct vfe_cmd_demux_channel_gain_config {
|
|
uint16_t ch0EvenGain;
|
|
uint16_t ch0OddGain;
|
|
uint16_t ch1Gain;
|
|
uint16_t ch2Gain;
|
|
};
|
|
|
|
struct vfe_cmds_demosaic_abf {
|
|
uint8_t enable;
|
|
uint8_t forceOn;
|
|
uint8_t shift;
|
|
uint16_t lpThreshold;
|
|
uint16_t max;
|
|
uint16_t min;
|
|
uint8_t ratio;
|
|
};
|
|
|
|
struct vfe_cmds_demosaic_bpc {
|
|
uint8_t enable;
|
|
uint16_t fmaxThreshold;
|
|
uint16_t fminThreshold;
|
|
uint16_t redDiffThreshold;
|
|
uint16_t blueDiffThreshold;
|
|
uint16_t greenDiffThreshold;
|
|
};
|
|
|
|
struct vfe_cmd_demosaic_config {
|
|
uint8_t enable;
|
|
uint8_t slopeShift;
|
|
struct vfe_cmds_demosaic_abf abfConfig;
|
|
struct vfe_cmds_demosaic_bpc bpcConfig;
|
|
};
|
|
|
|
struct vfe_cmd_demosaic_bpc_update {
|
|
struct vfe_cmds_demosaic_bpc bpcUpdate;
|
|
};
|
|
|
|
struct vfe_cmd_demosaic_abf_update {
|
|
struct vfe_cmds_demosaic_abf abfUpdate;
|
|
};
|
|
|
|
struct vfe_cmd_white_balance_config {
|
|
uint8_t enable;
|
|
uint16_t ch2Gain;
|
|
uint16_t ch1Gain;
|
|
uint16_t ch0Gain;
|
|
};
|
|
|
|
enum VFE_COLOR_CORRECTION_COEF_QFACTOR {
|
|
COEF_IS_Q7_SIGNED,
|
|
COEF_IS_Q8_SIGNED,
|
|
COEF_IS_Q9_SIGNED,
|
|
COEF_IS_Q10_SIGNED
|
|
};
|
|
|
|
struct vfe_cmd_color_correction_config {
|
|
uint8_t enable;
|
|
enum VFE_COLOR_CORRECTION_COEF_QFACTOR coefQFactor;
|
|
int16_t C0;
|
|
int16_t C1;
|
|
int16_t C2;
|
|
int16_t C3;
|
|
int16_t C4;
|
|
int16_t C5;
|
|
int16_t C6;
|
|
int16_t C7;
|
|
int16_t C8;
|
|
int16_t K0;
|
|
int16_t K1;
|
|
int16_t K2;
|
|
};
|
|
|
|
#define VFE_LA_TABLE_LENGTH 256
|
|
struct vfe_cmd_la_config {
|
|
uint8_t enable;
|
|
int16_t table[VFE_LA_TABLE_LENGTH];
|
|
};
|
|
|
|
#define VFE_GAMMA_TABLE_LENGTH 256
|
|
enum VFE_RGB_GAMMA_TABLE_SELECT {
|
|
RGB_GAMMA_CH0_SELECTED,
|
|
RGB_GAMMA_CH1_SELECTED,
|
|
RGB_GAMMA_CH2_SELECTED,
|
|
RGB_GAMMA_CH0_CH1_SELECTED,
|
|
RGB_GAMMA_CH0_CH2_SELECTED,
|
|
RGB_GAMMA_CH1_CH2_SELECTED,
|
|
RGB_GAMMA_CH0_CH1_CH2_SELECTED
|
|
};
|
|
|
|
struct vfe_cmd_rgb_gamma_config {
|
|
uint8_t enable;
|
|
enum VFE_RGB_GAMMA_TABLE_SELECT channelSelect;
|
|
int16_t table[VFE_GAMMA_TABLE_LENGTH];
|
|
};
|
|
|
|
struct vfe_cmd_chroma_enhan_config {
|
|
uint8_t enable;
|
|
int16_t am;
|
|
int16_t ap;
|
|
int16_t bm;
|
|
int16_t bp;
|
|
int16_t cm;
|
|
int16_t cp;
|
|
int16_t dm;
|
|
int16_t dp;
|
|
int16_t kcr;
|
|
int16_t kcb;
|
|
int16_t RGBtoYConversionV0;
|
|
int16_t RGBtoYConversionV1;
|
|
int16_t RGBtoYConversionV2;
|
|
uint8_t RGBtoYConversionOffset;
|
|
};
|
|
|
|
struct vfe_cmd_chroma_suppression_config {
|
|
uint8_t enable;
|
|
uint8_t m1;
|
|
uint8_t m3;
|
|
uint8_t n1;
|
|
uint8_t n3;
|
|
uint8_t nn1;
|
|
uint8_t mm1;
|
|
};
|
|
|
|
struct vfe_cmd_asf_config {
|
|
uint8_t enable;
|
|
uint8_t smoothFilterEnabled;
|
|
uint8_t sharpMode;
|
|
uint8_t smoothCoefCenter;
|
|
uint8_t smoothCoefSurr;
|
|
uint8_t normalizeFactor;
|
|
uint8_t sharpK1;
|
|
uint8_t sharpK2;
|
|
uint8_t sharpThreshE1;
|
|
int8_t sharpThreshE2;
|
|
int8_t sharpThreshE3;
|
|
int8_t sharpThreshE4;
|
|
int8_t sharpThreshE5;
|
|
int8_t filter1Coefficients[9];
|
|
int8_t filter2Coefficients[9];
|
|
uint8_t cropEnable;
|
|
uint16_t cropFirstPixel;
|
|
uint16_t cropLastPixel;
|
|
uint16_t cropFirstLine;
|
|
uint16_t cropLastLine;
|
|
};
|
|
|
|
struct vfe_cmd_asf_update {
|
|
uint8_t enable;
|
|
uint8_t smoothFilterEnabled;
|
|
uint8_t sharpMode;
|
|
uint8_t smoothCoefCenter;
|
|
uint8_t smoothCoefSurr;
|
|
uint8_t normalizeFactor;
|
|
uint8_t sharpK1;
|
|
uint8_t sharpK2;
|
|
uint8_t sharpThreshE1;
|
|
int8_t sharpThreshE2;
|
|
int8_t sharpThreshE3;
|
|
int8_t sharpThreshE4;
|
|
int8_t sharpThreshE5;
|
|
int8_t filter1Coefficients[9];
|
|
int8_t filter2Coefficients[9];
|
|
uint8_t cropEnable;
|
|
};
|
|
|
|
enum VFE_TEST_GEN_SYNC_EDGE {
|
|
VFE_TEST_GEN_SYNC_EDGE_ActiveHigh,
|
|
VFE_TEST_GEN_SYNC_EDGE_ActiveLow
|
|
};
|
|
|
|
struct vfe_cmd_test_gen_start {
|
|
uint8_t pixelDataSelect;
|
|
uint8_t systematicDataSelect;
|
|
enum VFE_TEST_GEN_SYNC_EDGE hsyncEdge;
|
|
enum VFE_TEST_GEN_SYNC_EDGE vsyncEdge;
|
|
uint16_t numFrame;
|
|
enum VFE_RAW_PIXEL_DATA_SIZE pixelDataSize;
|
|
uint16_t imageWidth;
|
|
uint16_t imageHeight;
|
|
uint32_t startOfFrameOffset;
|
|
uint32_t endOfFrameNOffset;
|
|
uint16_t startOfLineOffset;
|
|
uint16_t endOfLineNOffset;
|
|
uint16_t hbi;
|
|
uint8_t vblEnable;
|
|
uint16_t vbl;
|
|
uint8_t startOfFrameDummyLine;
|
|
uint8_t endOfFrameDummyLine;
|
|
uint8_t unicolorBarEnable;
|
|
uint8_t colorBarsSplitEnable;
|
|
uint8_t unicolorBarSelect;
|
|
enum VFE_START_PIXEL_PATTERN colorBarsPixelPattern;
|
|
uint8_t colorBarsRotatePeriod;
|
|
uint16_t testGenRandomSeed;
|
|
};
|
|
|
|
struct vfe_cmd_bus_pm_start {
|
|
uint8_t output2YWrPmEnable;
|
|
uint8_t output2CbcrWrPmEnable;
|
|
uint8_t output1YWrPmEnable;
|
|
uint8_t output1CbcrWrPmEnable;
|
|
};
|
|
|
|
struct vfe_cmd_camif_frame_update {
|
|
struct vfe_cmds_camif_frame camifFrame;
|
|
};
|
|
|
|
struct vfe_cmd_sync_timer_setting {
|
|
uint8_t whichSyncTimer;
|
|
uint8_t operation;
|
|
uint8_t polarity;
|
|
uint16_t repeatCount;
|
|
uint16_t hsyncCount;
|
|
uint32_t pclkCount;
|
|
uint32_t outputDuration;
|
|
};
|
|
|
|
struct vfe_cmd_async_timer_setting {
|
|
uint8_t whichAsyncTimer;
|
|
uint8_t operation;
|
|
uint8_t polarity;
|
|
uint16_t repeatCount;
|
|
uint16_t inactiveCount;
|
|
uint32_t activeCount;
|
|
};
|
|
|
|
struct vfe_frame_skip_counts {
|
|
uint32_t totalFrameCount;
|
|
uint32_t output1Count;
|
|
uint32_t output2Count;
|
|
};
|
|
|
|
enum VFE_AXI_RD_UNPACK_HBI_SEL {
|
|
VFE_AXI_RD_HBI_32_CLOCK_CYCLES,
|
|
VFE_AXI_RD_HBI_64_CLOCK_CYCLES,
|
|
VFE_AXI_RD_HBI_128_CLOCK_CYCLES,
|
|
VFE_AXI_RD_HBI_256_CLOCK_CYCLES,
|
|
VFE_AXI_RD_HBI_512_CLOCK_CYCLES,
|
|
VFE_AXI_RD_HBI_1024_CLOCK_CYCLES,
|
|
VFE_AXI_RD_HBI_2048_CLOCK_CYCLES,
|
|
VFE_AXI_RD_HBI_4096_CLOCK_CYCLES
|
|
};
|
|
|
|
struct vfe_cmd_axi_input_config {
|
|
uint32_t fragAddr[4];
|
|
uint8_t totalFragmentCount;
|
|
uint16_t ySize;
|
|
uint16_t xOffset;
|
|
uint16_t xSize;
|
|
uint16_t rowIncrement;
|
|
uint16_t numOfRows;
|
|
enum VFE_AXI_BURST_LENGTH burstLength;
|
|
uint8_t unpackPhase;
|
|
enum VFE_AXI_RD_UNPACK_HBI_SEL unpackHbi;
|
|
enum VFE_RAW_PIXEL_DATA_SIZE pixelSize;
|
|
uint8_t padRepeatCountLeft;
|
|
uint8_t padRepeatCountRight;
|
|
uint8_t padRepeatCountTop;
|
|
uint8_t padRepeatCountBottom;
|
|
uint8_t padLeftComponentSelectCycle0;
|
|
uint8_t padLeftComponentSelectCycle1;
|
|
uint8_t padLeftComponentSelectCycle2;
|
|
uint8_t padLeftComponentSelectCycle3;
|
|
uint8_t padLeftStopCycle0;
|
|
uint8_t padLeftStopCycle1;
|
|
uint8_t padLeftStopCycle2;
|
|
uint8_t padLeftStopCycle3;
|
|
uint8_t padRightComponentSelectCycle0;
|
|
uint8_t padRightComponentSelectCycle1;
|
|
uint8_t padRightComponentSelectCycle2;
|
|
uint8_t padRightComponentSelectCycle3;
|
|
uint8_t padRightStopCycle0;
|
|
uint8_t padRightStopCycle1;
|
|
uint8_t padRightStopCycle2;
|
|
uint8_t padRightStopCycle3;
|
|
uint8_t padTopLineCount;
|
|
uint8_t padBottomLineCount;
|
|
};
|
|
|
|
struct vfe_interrupt_status {
|
|
uint8_t camifErrorIrq;
|
|
uint8_t camifSofIrq;
|
|
uint8_t camifEolIrq;
|
|
uint8_t camifEofIrq;
|
|
uint8_t camifEpoch1Irq;
|
|
uint8_t camifEpoch2Irq;
|
|
uint8_t camifOverflowIrq;
|
|
uint8_t ceIrq;
|
|
uint8_t regUpdateIrq;
|
|
uint8_t resetAckIrq;
|
|
uint8_t encYPingpongIrq;
|
|
uint8_t encCbcrPingpongIrq;
|
|
uint8_t viewYPingpongIrq;
|
|
uint8_t viewCbcrPingpongIrq;
|
|
uint8_t rdPingpongIrq;
|
|
uint8_t afPingpongIrq;
|
|
uint8_t awbPingpongIrq;
|
|
uint8_t histPingpongIrq;
|
|
uint8_t encIrq;
|
|
uint8_t viewIrq;
|
|
uint8_t busOverflowIrq;
|
|
uint8_t afOverflowIrq;
|
|
uint8_t awbOverflowIrq;
|
|
uint8_t syncTimer0Irq;
|
|
uint8_t syncTimer1Irq;
|
|
uint8_t syncTimer2Irq;
|
|
uint8_t asyncTimer0Irq;
|
|
uint8_t asyncTimer1Irq;
|
|
uint8_t asyncTimer2Irq;
|
|
uint8_t asyncTimer3Irq;
|
|
uint8_t axiErrorIrq;
|
|
uint8_t violationIrq;
|
|
uint8_t anyErrorIrqs;
|
|
uint8_t anyOutput1PathIrqs;
|
|
uint8_t anyOutput2PathIrqs;
|
|
uint8_t anyOutputPathIrqs;
|
|
uint8_t anyAsyncTimerIrqs;
|
|
uint8_t anySyncTimerIrqs;
|
|
uint8_t anyIrqForActiveStatesOnly;
|
|
};
|
|
|
|
enum VFE_MESSAGE_ID {
|
|
VFE_MSG_ID_RESET_ACK,
|
|
VFE_MSG_ID_START_ACK,
|
|
VFE_MSG_ID_STOP_ACK,
|
|
VFE_MSG_ID_UPDATE_ACK,
|
|
VFE_MSG_ID_OUTPUT1,
|
|
VFE_MSG_ID_OUTPUT2,
|
|
VFE_MSG_ID_SNAPSHOT_DONE,
|
|
VFE_MSG_ID_STATS_AUTOFOCUS,
|
|
VFE_MSG_ID_STATS_WB_EXP,
|
|
VFE_MSG_ID_EPOCH1,
|
|
VFE_MSG_ID_EPOCH2,
|
|
VFE_MSG_ID_SYNC_TIMER0_DONE,
|
|
VFE_MSG_ID_SYNC_TIMER1_DONE,
|
|
VFE_MSG_ID_SYNC_TIMER2_DONE,
|
|
VFE_MSG_ID_ASYNC_TIMER0_DONE,
|
|
VFE_MSG_ID_ASYNC_TIMER1_DONE,
|
|
VFE_MSG_ID_ASYNC_TIMER2_DONE,
|
|
VFE_MSG_ID_ASYNC_TIMER3_DONE,
|
|
VFE_MSG_ID_AF_OVERFLOW,
|
|
VFE_MSG_ID_AWB_OVERFLOW,
|
|
VFE_MSG_ID_AXI_ERROR,
|
|
VFE_MSG_ID_CAMIF_OVERFLOW,
|
|
VFE_MSG_ID_VIOLATION,
|
|
VFE_MSG_ID_CAMIF_ERROR,
|
|
VFE_MSG_ID_BUS_OVERFLOW,
|
|
};
|
|
|
|
struct vfe_msg_stats_autofocus {
|
|
uint32_t afBuffer;
|
|
uint32_t frameCounter;
|
|
};
|
|
|
|
struct vfe_msg_stats_wb_exp {
|
|
uint32_t awbBuffer;
|
|
uint32_t frameCounter;
|
|
};
|
|
|
|
struct vfe_frame_bpc_info {
|
|
uint32_t greenDefectPixelCount;
|
|
uint32_t redBlueDefectPixelCount;
|
|
};
|
|
|
|
struct vfe_frame_asf_info {
|
|
uint32_t asfMaxEdge;
|
|
uint32_t asfHbiCount;
|
|
};
|
|
|
|
struct vfe_msg_camif_status {
|
|
uint8_t camifState;
|
|
uint32_t pixelCount;
|
|
uint32_t lineCount;
|
|
};
|
|
|
|
struct vfe_bus_pm_per_path {
|
|
uint32_t yWrPmStats0;
|
|
uint32_t yWrPmStats1;
|
|
uint32_t cbcrWrPmStats0;
|
|
uint32_t cbcrWrPmStats1;
|
|
};
|
|
|
|
struct vfe_bus_performance_monitor {
|
|
struct vfe_bus_pm_per_path encPathPmInfo;
|
|
struct vfe_bus_pm_per_path viewPathPmInfo;
|
|
};
|
|
|
|
struct vfe_irq_thread_msg {
|
|
uint32_t vfeIrqStatus;
|
|
uint32_t camifStatus;
|
|
uint32_t demosaicStatus;
|
|
uint32_t asfMaxEdge;
|
|
struct vfe_bus_performance_monitor pmInfo;
|
|
};
|
|
|
|
struct vfe_msg_output {
|
|
uint32_t yBuffer;
|
|
uint32_t cbcrBuffer;
|
|
struct vfe_frame_bpc_info bpcInfo;
|
|
struct vfe_frame_asf_info asfInfo;
|
|
uint32_t frameCounter;
|
|
struct vfe_bus_pm_per_path pmData;
|
|
};
|
|
|
|
struct vfe_message {
|
|
enum VFE_MESSAGE_ID _d;
|
|
union {
|
|
struct vfe_msg_output msgOutput1;
|
|
struct vfe_msg_output msgOutput2;
|
|
struct vfe_msg_stats_autofocus msgStatsAf;
|
|
struct vfe_msg_stats_wb_exp msgStatsWbExp;
|
|
struct vfe_msg_camif_status msgCamifError;
|
|
struct vfe_bus_performance_monitor msgBusOverflow;
|
|
} _u;
|
|
};
|
|
|
|
/* New one for 8k */
|
|
struct msm_vfe_command_8k {
|
|
int32_t id;
|
|
uint16_t length;
|
|
void *value;
|
|
};
|
|
|
|
struct vfe_frame_extra {
|
|
struct vfe_frame_bpc_info bpcInfo;
|
|
struct vfe_frame_asf_info asfInfo;
|
|
uint32_t frameCounter;
|
|
struct vfe_bus_pm_per_path pmData;
|
|
};
|
|
#endif /* __MSM_VFE8X_H__ */
|