a0e31fb090
* Fix wrong txx9_clockevent interrupt number * Fix TXX9_IRQ_BASE for JMR3927+FPCIB case Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
35 lines
738 B
C
35 lines
738 B
C
/*
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* include/asm-mips/txx9irq.h
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* TX39/TX49 interrupt controller definitions.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __ASM_TXX9IRQ_H
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#define __ASM_TXX9IRQ_H
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#include <irq.h>
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#ifdef CONFIG_IRQ_CPU
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#define TXX9_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
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#else
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#ifdef CONFIG_I8259
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#define TXX9_IRQ_BASE (I8259A_IRQ_BASE + 16)
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#else
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#define TXX9_IRQ_BASE 0
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#endif
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#endif
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#ifdef CONFIG_CPU_TX39XX
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#define TXx9_MAX_IR 16
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#else
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#define TXx9_MAX_IR 32
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#endif
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void txx9_irq_init(unsigned long baseaddr);
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int txx9_irq(void);
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int txx9_irq_set_pri(int irc_irq, int new_pri);
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#endif /* __ASM_TXX9IRQ_H */
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