![Andi Kleen](/assets/img/avatar_default.png)
Commit 19d36ccdc3
"x86: Fix alternatives
and kprobes to remap write-protected kernel text" uses code which is
being patched for patching.
In particular, paravirt_ops does patching in two stages: first it
calls paravirt_ops.patch, then it fills any remaining instructions
with nop_out(). nop_out calls text_poke() which calls
lookup_address() which calls pgd_val() (aka paravirt_ops.pgd_val):
that call site is one of the places we patch.
If we always do patching as one single call to text_poke(), we only
need make sure we're not patching the memcpy in text_poke itself.
This means the prototype to paravirt_ops.patch needs to change, to
marshal the new code into a buffer rather than patching in place as it
does now. It also means all patching goes through text_poke(), which
is known to be safe (apply_alternatives is also changed to make a
single patch).
AK: fix compilation on x86-64 (bad rusty!)
AK: fix boot on x86-64 (sigh)
AK: merged with other patches
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
1086 lines
29 KiB
C
1086 lines
29 KiB
C
#ifndef __ASM_PARAVIRT_H
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#define __ASM_PARAVIRT_H
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/* Various instructions on x86 need to be replaced for
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* para-virtualization: those hooks are defined here. */
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#ifdef CONFIG_PARAVIRT
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#include <asm/page.h>
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/* Bitmask of what can be clobbered: usually at least eax. */
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#define CLBR_NONE 0x0
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#define CLBR_EAX 0x1
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#define CLBR_ECX 0x2
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#define CLBR_EDX 0x4
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#define CLBR_ANY 0x7
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <linux/cpumask.h>
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#include <asm/kmap_types.h>
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struct page;
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struct thread_struct;
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struct Xgt_desc_struct;
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struct tss_struct;
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struct mm_struct;
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struct desc_struct;
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/* Lazy mode for batching updates / context switch */
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enum paravirt_lazy_mode {
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PARAVIRT_LAZY_NONE = 0,
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PARAVIRT_LAZY_MMU = 1,
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PARAVIRT_LAZY_CPU = 2,
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PARAVIRT_LAZY_FLUSH = 3,
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};
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struct paravirt_ops
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{
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unsigned int kernel_rpl;
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int shared_kernel_pmd;
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int paravirt_enabled;
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const char *name;
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/*
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* Patch may replace one of the defined code sequences with arbitrary
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* code, subject to the same register constraints. This generally
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* means the code is not free to clobber any registers other than EAX.
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* The patch function should return the number of bytes of code
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* generated, as we nop pad the rest in generic code.
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*/
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unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
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unsigned long addr, unsigned len);
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/* Basic arch-specific setup */
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void (*arch_setup)(void);
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char *(*memory_setup)(void);
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void (*post_allocator_init)(void);
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void (*init_IRQ)(void);
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void (*time_init)(void);
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/*
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* Called before/after init_mm pagetable setup. setup_start
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* may reset %cr3, and may pre-install parts of the pagetable;
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* pagetable setup is expected to preserve any existing
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* mapping.
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*/
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void (*pagetable_setup_start)(pgd_t *pgd_base);
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void (*pagetable_setup_done)(pgd_t *pgd_base);
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/* Print a banner to identify the environment */
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void (*banner)(void);
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/* Set and set time of day */
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unsigned long (*get_wallclock)(void);
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int (*set_wallclock)(unsigned long);
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/* cpuid emulation, mostly so that caps bits can be disabled */
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void (*cpuid)(unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx);
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/* hooks for various privileged instructions */
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unsigned long (*get_debugreg)(int regno);
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void (*set_debugreg)(int regno, unsigned long value);
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void (*clts)(void);
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unsigned long (*read_cr0)(void);
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void (*write_cr0)(unsigned long);
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unsigned long (*read_cr2)(void);
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void (*write_cr2)(unsigned long);
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unsigned long (*read_cr3)(void);
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void (*write_cr3)(unsigned long);
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unsigned long (*read_cr4_safe)(void);
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unsigned long (*read_cr4)(void);
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void (*write_cr4)(unsigned long);
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/*
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* Get/set interrupt state. save_fl and restore_fl are only
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* expected to use X86_EFLAGS_IF; all other bits
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* returned from save_fl are undefined, and may be ignored by
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* restore_fl.
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*/
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unsigned long (*save_fl)(void);
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void (*restore_fl)(unsigned long);
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void (*irq_disable)(void);
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void (*irq_enable)(void);
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void (*safe_halt)(void);
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void (*halt)(void);
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void (*wbinvd)(void);
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/* MSR, PMC and TSR operations.
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err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
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u64 (*read_msr)(unsigned int msr, int *err);
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int (*write_msr)(unsigned int msr, u64 val);
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u64 (*read_tsc)(void);
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u64 (*read_pmc)(void);
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unsigned long long (*sched_clock)(void);
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unsigned long (*get_cpu_khz)(void);
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/* Segment descriptor handling */
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void (*load_tr_desc)(void);
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void (*load_gdt)(const struct Xgt_desc_struct *);
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void (*load_idt)(const struct Xgt_desc_struct *);
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void (*store_gdt)(struct Xgt_desc_struct *);
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void (*store_idt)(struct Xgt_desc_struct *);
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void (*set_ldt)(const void *desc, unsigned entries);
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unsigned long (*store_tr)(void);
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void (*load_tls)(struct thread_struct *t, unsigned int cpu);
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void (*write_ldt_entry)(struct desc_struct *,
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int entrynum, u32 low, u32 high);
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void (*write_gdt_entry)(struct desc_struct *,
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int entrynum, u32 low, u32 high);
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void (*write_idt_entry)(struct desc_struct *,
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int entrynum, u32 low, u32 high);
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void (*load_esp0)(struct tss_struct *tss, struct thread_struct *t);
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void (*set_iopl_mask)(unsigned mask);
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void (*io_delay)(void);
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/*
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* Hooks for intercepting the creation/use/destruction of an
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* mm_struct.
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*/
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void (*activate_mm)(struct mm_struct *prev,
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struct mm_struct *next);
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void (*dup_mmap)(struct mm_struct *oldmm,
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struct mm_struct *mm);
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void (*exit_mmap)(struct mm_struct *mm);
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#ifdef CONFIG_X86_LOCAL_APIC
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/*
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* Direct APIC operations, principally for VMI. Ideally
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* these shouldn't be in this interface.
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*/
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void (*apic_write)(unsigned long reg, unsigned long v);
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void (*apic_write_atomic)(unsigned long reg, unsigned long v);
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unsigned long (*apic_read)(unsigned long reg);
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void (*setup_boot_clock)(void);
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void (*setup_secondary_clock)(void);
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void (*startup_ipi_hook)(int phys_apicid,
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unsigned long start_eip,
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unsigned long start_esp);
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#endif
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/* TLB operations */
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void (*flush_tlb_user)(void);
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void (*flush_tlb_kernel)(void);
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void (*flush_tlb_single)(unsigned long addr);
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void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
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unsigned long va);
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/* Hooks for allocating/releasing pagetable pages */
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void (*alloc_pt)(struct mm_struct *mm, u32 pfn);
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void (*alloc_pd)(u32 pfn);
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void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
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void (*release_pt)(u32 pfn);
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void (*release_pd)(u32 pfn);
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/* Pagetable manipulation functions */
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void (*set_pte)(pte_t *ptep, pte_t pteval);
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void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t pteval);
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void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
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void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
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void (*pte_update_defer)(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep);
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#ifdef CONFIG_HIGHPTE
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void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
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#endif
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#ifdef CONFIG_X86_PAE
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void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
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void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte);
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void (*set_pud)(pud_t *pudp, pud_t pudval);
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void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
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void (*pmd_clear)(pmd_t *pmdp);
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unsigned long long (*pte_val)(pte_t);
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unsigned long long (*pmd_val)(pmd_t);
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unsigned long long (*pgd_val)(pgd_t);
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pte_t (*make_pte)(unsigned long long pte);
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pmd_t (*make_pmd)(unsigned long long pmd);
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pgd_t (*make_pgd)(unsigned long long pgd);
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#else
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unsigned long (*pte_val)(pte_t);
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unsigned long (*pgd_val)(pgd_t);
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pte_t (*make_pte)(unsigned long pte);
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pgd_t (*make_pgd)(unsigned long pgd);
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#endif
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/* Set deferred update mode, used for batching operations. */
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void (*set_lazy_mode)(enum paravirt_lazy_mode mode);
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/* These two are jmp to, not actually called. */
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void (*irq_enable_sysexit)(void);
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void (*iret)(void);
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};
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extern struct paravirt_ops paravirt_ops;
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#define PARAVIRT_PATCH(x) \
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(offsetof(struct paravirt_ops, x) / sizeof(void *))
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#define paravirt_type(type) \
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[paravirt_typenum] "i" (PARAVIRT_PATCH(type))
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#define paravirt_clobber(clobber) \
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[paravirt_clobber] "i" (clobber)
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/*
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* Generate some code, and mark it as patchable by the
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* apply_paravirt() alternate instruction patcher.
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*/
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#define _paravirt_alt(insn_string, type, clobber) \
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"771:\n\t" insn_string "\n" "772:\n" \
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".pushsection .parainstructions,\"a\"\n" \
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" .long 771b\n" \
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" .byte " type "\n" \
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" .byte 772b-771b\n" \
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" .short " clobber "\n" \
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".popsection\n"
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/* Generate patchable code, with the default asm parameters. */
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#define paravirt_alt(insn_string) \
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_paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
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unsigned paravirt_patch_nop(void);
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unsigned paravirt_patch_ignore(unsigned len);
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unsigned paravirt_patch_call(void *insnbuf,
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const void *target, u16 tgt_clobbers,
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unsigned long addr, u16 site_clobbers,
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unsigned len);
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unsigned paravirt_patch_jmp(const void *target, void *insnbuf,
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unsigned long addr, unsigned len);
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unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
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unsigned long addr, unsigned len);
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unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
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const char *start, const char *end);
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int paravirt_disable_iospace(void);
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/*
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* This generates an indirect call based on the operation type number.
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* The type number, computed in PARAVIRT_PATCH, is derived from the
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* offset into the paravirt_ops structure, and can therefore be freely
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* converted back into a structure offset.
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*/
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#define PARAVIRT_CALL "call *(paravirt_ops+%c[paravirt_typenum]*4);"
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/*
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* These macros are intended to wrap calls into a paravirt_ops
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* operation, so that they can be later identified and patched at
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* runtime.
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*
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* Normally, a call to a pv_op function is a simple indirect call:
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* (paravirt_ops.operations)(args...).
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*
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* Unfortunately, this is a relatively slow operation for modern CPUs,
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* because it cannot necessarily determine what the destination
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* address is. In this case, the address is a runtime constant, so at
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* the very least we can patch the call to e a simple direct call, or
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* ideally, patch an inline implementation into the callsite. (Direct
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* calls are essentially free, because the call and return addresses
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* are completely predictable.)
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*
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* These macros rely on the standard gcc "regparm(3)" calling
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* convention, in which the first three arguments are placed in %eax,
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* %edx, %ecx (in that order), and the remaining arguments are placed
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* on the stack. All caller-save registers (eax,edx,ecx) are expected
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* to be modified (either clobbered or used for return values).
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*
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* The call instruction itself is marked by placing its start address
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* and size into the .parainstructions section, so that
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* apply_paravirt() in arch/i386/kernel/alternative.c can do the
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* appropriate patching under the control of the backend paravirt_ops
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* implementation.
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*
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* Unfortunately there's no way to get gcc to generate the args setup
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* for the call, and then allow the call itself to be generated by an
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* inline asm. Because of this, we must do the complete arg setup and
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* return value handling from within these macros. This is fairly
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* cumbersome.
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*
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* There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
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* It could be extended to more arguments, but there would be little
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* to be gained from that. For each number of arguments, there are
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* the two VCALL and CALL variants for void and non-void functions.
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*
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* When there is a return value, the invoker of the macro must specify
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* the return type. The macro then uses sizeof() on that type to
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* determine whether its a 32 or 64 bit value, and places the return
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* in the right register(s) (just %eax for 32-bit, and %edx:%eax for
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* 64-bit).
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*
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* 64-bit arguments are passed as a pair of adjacent 32-bit arguments
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* in low,high order.
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*
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* Small structures are passed and returned in registers. The macro
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* calling convention can't directly deal with this, so the wrapper
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* functions must do this.
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*
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* These PVOP_* macros are only defined within this header. This
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* means that all uses must be wrapped in inline functions. This also
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* makes sure the incoming and outgoing types are always correct.
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*/
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#define __PVOP_CALL(rettype, op, pre, post, ...) \
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({ \
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rettype __ret; \
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unsigned long __eax, __edx, __ecx; \
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if (sizeof(rettype) > sizeof(unsigned long)) { \
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asm volatile(pre \
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paravirt_alt(PARAVIRT_CALL) \
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post \
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: "=a" (__eax), "=d" (__edx), \
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"=c" (__ecx) \
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: paravirt_type(op), \
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paravirt_clobber(CLBR_ANY), \
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##__VA_ARGS__ \
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: "memory", "cc"); \
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__ret = (rettype)((((u64)__edx) << 32) | __eax); \
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} else { \
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asm volatile(pre \
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paravirt_alt(PARAVIRT_CALL) \
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post \
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: "=a" (__eax), "=d" (__edx), \
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"=c" (__ecx) \
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: paravirt_type(op), \
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paravirt_clobber(CLBR_ANY), \
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##__VA_ARGS__ \
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: "memory", "cc"); \
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__ret = (rettype)__eax; \
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} \
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__ret; \
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})
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#define __PVOP_VCALL(op, pre, post, ...) \
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({ \
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unsigned long __eax, __edx, __ecx; \
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asm volatile(pre \
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paravirt_alt(PARAVIRT_CALL) \
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post \
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: "=a" (__eax), "=d" (__edx), "=c" (__ecx) \
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: paravirt_type(op), \
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paravirt_clobber(CLBR_ANY), \
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##__VA_ARGS__ \
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: "memory", "cc"); \
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})
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#define PVOP_CALL0(rettype, op) \
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__PVOP_CALL(rettype, op, "", "")
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#define PVOP_VCALL0(op) \
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__PVOP_VCALL(op, "", "")
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#define PVOP_CALL1(rettype, op, arg1) \
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__PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)))
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#define PVOP_VCALL1(op, arg1) \
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__PVOP_VCALL(op, "", "", "0" ((u32)(arg1)))
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#define PVOP_CALL2(rettype, op, arg1, arg2) \
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__PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
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#define PVOP_VCALL2(op, arg1, arg2) \
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__PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2)))
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#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
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__PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), \
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"1"((u32)(arg2)), "2"((u32)(arg3)))
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#define PVOP_VCALL3(op, arg1, arg2, arg3) \
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__PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1"((u32)(arg2)), \
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"2"((u32)(arg3)))
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#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
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__PVOP_CALL(rettype, op, \
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"push %[_arg4];", "lea 4(%%esp),%%esp;", \
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"0" ((u32)(arg1)), "1" ((u32)(arg2)), \
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"2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
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#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
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__PVOP_VCALL(op, \
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"push %[_arg4];", "lea 4(%%esp),%%esp;", \
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"0" ((u32)(arg1)), "1" ((u32)(arg2)), \
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"2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
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static inline int paravirt_enabled(void)
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{
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return paravirt_ops.paravirt_enabled;
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}
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static inline void load_esp0(struct tss_struct *tss,
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struct thread_struct *thread)
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{
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PVOP_VCALL2(load_esp0, tss, thread);
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}
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#define ARCH_SETUP paravirt_ops.arch_setup();
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static inline unsigned long get_wallclock(void)
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{
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return PVOP_CALL0(unsigned long, get_wallclock);
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}
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static inline int set_wallclock(unsigned long nowtime)
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{
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return PVOP_CALL1(int, set_wallclock, nowtime);
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}
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static inline void (*choose_time_init(void))(void)
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{
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return paravirt_ops.time_init;
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}
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/* The paravirtualized CPUID instruction. */
|
|
static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
|
|
unsigned int *ecx, unsigned int *edx)
|
|
{
|
|
PVOP_VCALL4(cpuid, eax, ebx, ecx, edx);
|
|
}
|
|
|
|
/*
|
|
* These special macros can be used to get or set a debugging register
|
|
*/
|
|
static inline unsigned long paravirt_get_debugreg(int reg)
|
|
{
|
|
return PVOP_CALL1(unsigned long, get_debugreg, reg);
|
|
}
|
|
#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
|
|
static inline void set_debugreg(unsigned long val, int reg)
|
|
{
|
|
PVOP_VCALL2(set_debugreg, reg, val);
|
|
}
|
|
|
|
static inline void clts(void)
|
|
{
|
|
PVOP_VCALL0(clts);
|
|
}
|
|
|
|
static inline unsigned long read_cr0(void)
|
|
{
|
|
return PVOP_CALL0(unsigned long, read_cr0);
|
|
}
|
|
|
|
static inline void write_cr0(unsigned long x)
|
|
{
|
|
PVOP_VCALL1(write_cr0, x);
|
|
}
|
|
|
|
static inline unsigned long read_cr2(void)
|
|
{
|
|
return PVOP_CALL0(unsigned long, read_cr2);
|
|
}
|
|
|
|
static inline void write_cr2(unsigned long x)
|
|
{
|
|
PVOP_VCALL1(write_cr2, x);
|
|
}
|
|
|
|
static inline unsigned long read_cr3(void)
|
|
{
|
|
return PVOP_CALL0(unsigned long, read_cr3);
|
|
}
|
|
|
|
static inline void write_cr3(unsigned long x)
|
|
{
|
|
PVOP_VCALL1(write_cr3, x);
|
|
}
|
|
|
|
static inline unsigned long read_cr4(void)
|
|
{
|
|
return PVOP_CALL0(unsigned long, read_cr4);
|
|
}
|
|
static inline unsigned long read_cr4_safe(void)
|
|
{
|
|
return PVOP_CALL0(unsigned long, read_cr4_safe);
|
|
}
|
|
|
|
static inline void write_cr4(unsigned long x)
|
|
{
|
|
PVOP_VCALL1(write_cr4, x);
|
|
}
|
|
|
|
static inline void raw_safe_halt(void)
|
|
{
|
|
PVOP_VCALL0(safe_halt);
|
|
}
|
|
|
|
static inline void halt(void)
|
|
{
|
|
PVOP_VCALL0(safe_halt);
|
|
}
|
|
|
|
static inline void wbinvd(void)
|
|
{
|
|
PVOP_VCALL0(wbinvd);
|
|
}
|
|
|
|
#define get_kernel_rpl() (paravirt_ops.kernel_rpl)
|
|
|
|
static inline u64 paravirt_read_msr(unsigned msr, int *err)
|
|
{
|
|
return PVOP_CALL2(u64, read_msr, msr, err);
|
|
}
|
|
static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
|
|
{
|
|
return PVOP_CALL3(int, write_msr, msr, low, high);
|
|
}
|
|
|
|
/* These should all do BUG_ON(_err), but our headers are too tangled. */
|
|
#define rdmsr(msr,val1,val2) do { \
|
|
int _err; \
|
|
u64 _l = paravirt_read_msr(msr, &_err); \
|
|
val1 = (u32)_l; \
|
|
val2 = _l >> 32; \
|
|
} while(0)
|
|
|
|
#define wrmsr(msr,val1,val2) do { \
|
|
paravirt_write_msr(msr, val1, val2); \
|
|
} while(0)
|
|
|
|
#define rdmsrl(msr,val) do { \
|
|
int _err; \
|
|
val = paravirt_read_msr(msr, &_err); \
|
|
} while(0)
|
|
|
|
#define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
|
|
#define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
|
|
|
|
/* rdmsr with exception handling */
|
|
#define rdmsr_safe(msr,a,b) ({ \
|
|
int _err; \
|
|
u64 _l = paravirt_read_msr(msr, &_err); \
|
|
(*a) = (u32)_l; \
|
|
(*b) = _l >> 32; \
|
|
_err; })
|
|
|
|
|
|
static inline u64 paravirt_read_tsc(void)
|
|
{
|
|
return PVOP_CALL0(u64, read_tsc);
|
|
}
|
|
|
|
#define rdtscl(low) do { \
|
|
u64 _l = paravirt_read_tsc(); \
|
|
low = (int)_l; \
|
|
} while(0)
|
|
|
|
#define rdtscll(val) (val = paravirt_read_tsc())
|
|
|
|
static inline unsigned long long paravirt_sched_clock(void)
|
|
{
|
|
return PVOP_CALL0(unsigned long long, sched_clock);
|
|
}
|
|
#define calculate_cpu_khz() (paravirt_ops.get_cpu_khz())
|
|
|
|
#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
|
|
|
|
static inline unsigned long long paravirt_read_pmc(int counter)
|
|
{
|
|
return PVOP_CALL1(u64, read_pmc, counter);
|
|
}
|
|
|
|
#define rdpmc(counter,low,high) do { \
|
|
u64 _l = paravirt_read_pmc(counter); \
|
|
low = (u32)_l; \
|
|
high = _l >> 32; \
|
|
} while(0)
|
|
|
|
static inline void load_TR_desc(void)
|
|
{
|
|
PVOP_VCALL0(load_tr_desc);
|
|
}
|
|
static inline void load_gdt(const struct Xgt_desc_struct *dtr)
|
|
{
|
|
PVOP_VCALL1(load_gdt, dtr);
|
|
}
|
|
static inline void load_idt(const struct Xgt_desc_struct *dtr)
|
|
{
|
|
PVOP_VCALL1(load_idt, dtr);
|
|
}
|
|
static inline void set_ldt(const void *addr, unsigned entries)
|
|
{
|
|
PVOP_VCALL2(set_ldt, addr, entries);
|
|
}
|
|
static inline void store_gdt(struct Xgt_desc_struct *dtr)
|
|
{
|
|
PVOP_VCALL1(store_gdt, dtr);
|
|
}
|
|
static inline void store_idt(struct Xgt_desc_struct *dtr)
|
|
{
|
|
PVOP_VCALL1(store_idt, dtr);
|
|
}
|
|
static inline unsigned long paravirt_store_tr(void)
|
|
{
|
|
return PVOP_CALL0(unsigned long, store_tr);
|
|
}
|
|
#define store_tr(tr) ((tr) = paravirt_store_tr())
|
|
static inline void load_TLS(struct thread_struct *t, unsigned cpu)
|
|
{
|
|
PVOP_VCALL2(load_tls, t, cpu);
|
|
}
|
|
static inline void write_ldt_entry(void *dt, int entry, u32 low, u32 high)
|
|
{
|
|
PVOP_VCALL4(write_ldt_entry, dt, entry, low, high);
|
|
}
|
|
static inline void write_gdt_entry(void *dt, int entry, u32 low, u32 high)
|
|
{
|
|
PVOP_VCALL4(write_gdt_entry, dt, entry, low, high);
|
|
}
|
|
static inline void write_idt_entry(void *dt, int entry, u32 low, u32 high)
|
|
{
|
|
PVOP_VCALL4(write_idt_entry, dt, entry, low, high);
|
|
}
|
|
static inline void set_iopl_mask(unsigned mask)
|
|
{
|
|
PVOP_VCALL1(set_iopl_mask, mask);
|
|
}
|
|
|
|
/* The paravirtualized I/O functions */
|
|
static inline void slow_down_io(void) {
|
|
paravirt_ops.io_delay();
|
|
#ifdef REALLY_SLOW_IO
|
|
paravirt_ops.io_delay();
|
|
paravirt_ops.io_delay();
|
|
paravirt_ops.io_delay();
|
|
#endif
|
|
}
|
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
|
/*
|
|
* Basic functions accessing APICs.
|
|
*/
|
|
static inline void apic_write(unsigned long reg, unsigned long v)
|
|
{
|
|
PVOP_VCALL2(apic_write, reg, v);
|
|
}
|
|
|
|
static inline void apic_write_atomic(unsigned long reg, unsigned long v)
|
|
{
|
|
PVOP_VCALL2(apic_write_atomic, reg, v);
|
|
}
|
|
|
|
static inline unsigned long apic_read(unsigned long reg)
|
|
{
|
|
return PVOP_CALL1(unsigned long, apic_read, reg);
|
|
}
|
|
|
|
static inline void setup_boot_clock(void)
|
|
{
|
|
PVOP_VCALL0(setup_boot_clock);
|
|
}
|
|
|
|
static inline void setup_secondary_clock(void)
|
|
{
|
|
PVOP_VCALL0(setup_secondary_clock);
|
|
}
|
|
#endif
|
|
|
|
static inline void paravirt_post_allocator_init(void)
|
|
{
|
|
if (paravirt_ops.post_allocator_init)
|
|
(*paravirt_ops.post_allocator_init)();
|
|
}
|
|
|
|
static inline void paravirt_pagetable_setup_start(pgd_t *base)
|
|
{
|
|
if (paravirt_ops.pagetable_setup_start)
|
|
(*paravirt_ops.pagetable_setup_start)(base);
|
|
}
|
|
|
|
static inline void paravirt_pagetable_setup_done(pgd_t *base)
|
|
{
|
|
if (paravirt_ops.pagetable_setup_done)
|
|
(*paravirt_ops.pagetable_setup_done)(base);
|
|
}
|
|
|
|
#ifdef CONFIG_SMP
|
|
static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
|
|
unsigned long start_esp)
|
|
{
|
|
PVOP_VCALL3(startup_ipi_hook, phys_apicid, start_eip, start_esp);
|
|
}
|
|
#endif
|
|
|
|
static inline void paravirt_activate_mm(struct mm_struct *prev,
|
|
struct mm_struct *next)
|
|
{
|
|
PVOP_VCALL2(activate_mm, prev, next);
|
|
}
|
|
|
|
static inline void arch_dup_mmap(struct mm_struct *oldmm,
|
|
struct mm_struct *mm)
|
|
{
|
|
PVOP_VCALL2(dup_mmap, oldmm, mm);
|
|
}
|
|
|
|
static inline void arch_exit_mmap(struct mm_struct *mm)
|
|
{
|
|
PVOP_VCALL1(exit_mmap, mm);
|
|
}
|
|
|
|
static inline void __flush_tlb(void)
|
|
{
|
|
PVOP_VCALL0(flush_tlb_user);
|
|
}
|
|
static inline void __flush_tlb_global(void)
|
|
{
|
|
PVOP_VCALL0(flush_tlb_kernel);
|
|
}
|
|
static inline void __flush_tlb_single(unsigned long addr)
|
|
{
|
|
PVOP_VCALL1(flush_tlb_single, addr);
|
|
}
|
|
|
|
static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
|
|
unsigned long va)
|
|
{
|
|
PVOP_VCALL3(flush_tlb_others, &cpumask, mm, va);
|
|
}
|
|
|
|
static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn)
|
|
{
|
|
PVOP_VCALL2(alloc_pt, mm, pfn);
|
|
}
|
|
static inline void paravirt_release_pt(unsigned pfn)
|
|
{
|
|
PVOP_VCALL1(release_pt, pfn);
|
|
}
|
|
|
|
static inline void paravirt_alloc_pd(unsigned pfn)
|
|
{
|
|
PVOP_VCALL1(alloc_pd, pfn);
|
|
}
|
|
|
|
static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
|
|
unsigned start, unsigned count)
|
|
{
|
|
PVOP_VCALL4(alloc_pd_clone, pfn, clonepfn, start, count);
|
|
}
|
|
static inline void paravirt_release_pd(unsigned pfn)
|
|
{
|
|
PVOP_VCALL1(release_pd, pfn);
|
|
}
|
|
|
|
#ifdef CONFIG_HIGHPTE
|
|
static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
|
|
{
|
|
unsigned long ret;
|
|
ret = PVOP_CALL2(unsigned long, kmap_atomic_pte, page, type);
|
|
return (void *)ret;
|
|
}
|
|
#endif
|
|
|
|
static inline void pte_update(struct mm_struct *mm, unsigned long addr,
|
|
pte_t *ptep)
|
|
{
|
|
PVOP_VCALL3(pte_update, mm, addr, ptep);
|
|
}
|
|
|
|
static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
|
|
pte_t *ptep)
|
|
{
|
|
PVOP_VCALL3(pte_update_defer, mm, addr, ptep);
|
|
}
|
|
|
|
#ifdef CONFIG_X86_PAE
|
|
static inline pte_t __pte(unsigned long long val)
|
|
{
|
|
unsigned long long ret = PVOP_CALL2(unsigned long long, make_pte,
|
|
val, val >> 32);
|
|
return (pte_t) { ret, ret >> 32 };
|
|
}
|
|
|
|
static inline pmd_t __pmd(unsigned long long val)
|
|
{
|
|
return (pmd_t) { PVOP_CALL2(unsigned long long, make_pmd, val, val >> 32) };
|
|
}
|
|
|
|
static inline pgd_t __pgd(unsigned long long val)
|
|
{
|
|
return (pgd_t) { PVOP_CALL2(unsigned long long, make_pgd, val, val >> 32) };
|
|
}
|
|
|
|
static inline unsigned long long pte_val(pte_t x)
|
|
{
|
|
return PVOP_CALL2(unsigned long long, pte_val, x.pte_low, x.pte_high);
|
|
}
|
|
|
|
static inline unsigned long long pmd_val(pmd_t x)
|
|
{
|
|
return PVOP_CALL2(unsigned long long, pmd_val, x.pmd, x.pmd >> 32);
|
|
}
|
|
|
|
static inline unsigned long long pgd_val(pgd_t x)
|
|
{
|
|
return PVOP_CALL2(unsigned long long, pgd_val, x.pgd, x.pgd >> 32);
|
|
}
|
|
|
|
static inline void set_pte(pte_t *ptep, pte_t pteval)
|
|
{
|
|
PVOP_VCALL3(set_pte, ptep, pteval.pte_low, pteval.pte_high);
|
|
}
|
|
|
|
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|
pte_t *ptep, pte_t pteval)
|
|
{
|
|
/* 5 arg words */
|
|
paravirt_ops.set_pte_at(mm, addr, ptep, pteval);
|
|
}
|
|
|
|
static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
|
|
{
|
|
PVOP_VCALL3(set_pte_atomic, ptep, pteval.pte_low, pteval.pte_high);
|
|
}
|
|
|
|
static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
|
|
pte_t *ptep, pte_t pte)
|
|
{
|
|
/* 5 arg words */
|
|
paravirt_ops.set_pte_present(mm, addr, ptep, pte);
|
|
}
|
|
|
|
static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
|
|
{
|
|
PVOP_VCALL3(set_pmd, pmdp, pmdval.pmd, pmdval.pmd >> 32);
|
|
}
|
|
|
|
static inline void set_pud(pud_t *pudp, pud_t pudval)
|
|
{
|
|
PVOP_VCALL3(set_pud, pudp, pudval.pgd.pgd, pudval.pgd.pgd >> 32);
|
|
}
|
|
|
|
static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
|
|
{
|
|
PVOP_VCALL3(pte_clear, mm, addr, ptep);
|
|
}
|
|
|
|
static inline void pmd_clear(pmd_t *pmdp)
|
|
{
|
|
PVOP_VCALL1(pmd_clear, pmdp);
|
|
}
|
|
|
|
#else /* !CONFIG_X86_PAE */
|
|
|
|
static inline pte_t __pte(unsigned long val)
|
|
{
|
|
return (pte_t) { PVOP_CALL1(unsigned long, make_pte, val) };
|
|
}
|
|
|
|
static inline pgd_t __pgd(unsigned long val)
|
|
{
|
|
return (pgd_t) { PVOP_CALL1(unsigned long, make_pgd, val) };
|
|
}
|
|
|
|
static inline unsigned long pte_val(pte_t x)
|
|
{
|
|
return PVOP_CALL1(unsigned long, pte_val, x.pte_low);
|
|
}
|
|
|
|
static inline unsigned long pgd_val(pgd_t x)
|
|
{
|
|
return PVOP_CALL1(unsigned long, pgd_val, x.pgd);
|
|
}
|
|
|
|
static inline void set_pte(pte_t *ptep, pte_t pteval)
|
|
{
|
|
PVOP_VCALL2(set_pte, ptep, pteval.pte_low);
|
|
}
|
|
|
|
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|
pte_t *ptep, pte_t pteval)
|
|
{
|
|
PVOP_VCALL4(set_pte_at, mm, addr, ptep, pteval.pte_low);
|
|
}
|
|
|
|
static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
|
|
{
|
|
PVOP_VCALL2(set_pmd, pmdp, pmdval.pud.pgd.pgd);
|
|
}
|
|
#endif /* CONFIG_X86_PAE */
|
|
|
|
#define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
|
|
static inline void arch_enter_lazy_cpu_mode(void)
|
|
{
|
|
PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_CPU);
|
|
}
|
|
|
|
static inline void arch_leave_lazy_cpu_mode(void)
|
|
{
|
|
PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE);
|
|
}
|
|
|
|
static inline void arch_flush_lazy_cpu_mode(void)
|
|
{
|
|
PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH);
|
|
}
|
|
|
|
|
|
#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
|
|
static inline void arch_enter_lazy_mmu_mode(void)
|
|
{
|
|
PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_MMU);
|
|
}
|
|
|
|
static inline void arch_leave_lazy_mmu_mode(void)
|
|
{
|
|
PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE);
|
|
}
|
|
|
|
static inline void arch_flush_lazy_mmu_mode(void)
|
|
{
|
|
PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH);
|
|
}
|
|
|
|
void _paravirt_nop(void);
|
|
#define paravirt_nop ((void *)_paravirt_nop)
|
|
|
|
/* These all sit in the .parainstructions section to tell us what to patch. */
|
|
struct paravirt_patch_site {
|
|
u8 *instr; /* original instructions */
|
|
u8 instrtype; /* type of this instruction */
|
|
u8 len; /* length of original instruction */
|
|
u16 clobbers; /* what registers you may clobber */
|
|
};
|
|
|
|
extern struct paravirt_patch_site __parainstructions[],
|
|
__parainstructions_end[];
|
|
|
|
static inline unsigned long __raw_local_save_flags(void)
|
|
{
|
|
unsigned long f;
|
|
|
|
asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
|
|
PARAVIRT_CALL
|
|
"popl %%edx; popl %%ecx")
|
|
: "=a"(f)
|
|
: paravirt_type(save_fl),
|
|
paravirt_clobber(CLBR_EAX)
|
|
: "memory", "cc");
|
|
return f;
|
|
}
|
|
|
|
static inline void raw_local_irq_restore(unsigned long f)
|
|
{
|
|
asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
|
|
PARAVIRT_CALL
|
|
"popl %%edx; popl %%ecx")
|
|
: "=a"(f)
|
|
: "0"(f),
|
|
paravirt_type(restore_fl),
|
|
paravirt_clobber(CLBR_EAX)
|
|
: "memory", "cc");
|
|
}
|
|
|
|
static inline void raw_local_irq_disable(void)
|
|
{
|
|
asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
|
|
PARAVIRT_CALL
|
|
"popl %%edx; popl %%ecx")
|
|
:
|
|
: paravirt_type(irq_disable),
|
|
paravirt_clobber(CLBR_EAX)
|
|
: "memory", "eax", "cc");
|
|
}
|
|
|
|
static inline void raw_local_irq_enable(void)
|
|
{
|
|
asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;"
|
|
PARAVIRT_CALL
|
|
"popl %%edx; popl %%ecx")
|
|
:
|
|
: paravirt_type(irq_enable),
|
|
paravirt_clobber(CLBR_EAX)
|
|
: "memory", "eax", "cc");
|
|
}
|
|
|
|
static inline unsigned long __raw_local_irq_save(void)
|
|
{
|
|
unsigned long f;
|
|
|
|
f = __raw_local_save_flags();
|
|
raw_local_irq_disable();
|
|
return f;
|
|
}
|
|
|
|
#define CLI_STRING \
|
|
_paravirt_alt("pushl %%ecx; pushl %%edx;" \
|
|
"call *paravirt_ops+%c[paravirt_cli_type]*4;" \
|
|
"popl %%edx; popl %%ecx", \
|
|
"%c[paravirt_cli_type]", "%c[paravirt_clobber]")
|
|
|
|
#define STI_STRING \
|
|
_paravirt_alt("pushl %%ecx; pushl %%edx;" \
|
|
"call *paravirt_ops+%c[paravirt_sti_type]*4;" \
|
|
"popl %%edx; popl %%ecx", \
|
|
"%c[paravirt_sti_type]", "%c[paravirt_clobber]")
|
|
|
|
#define CLI_STI_CLOBBERS , "%eax"
|
|
#define CLI_STI_INPUT_ARGS \
|
|
, \
|
|
[paravirt_cli_type] "i" (PARAVIRT_PATCH(irq_disable)), \
|
|
[paravirt_sti_type] "i" (PARAVIRT_PATCH(irq_enable)), \
|
|
paravirt_clobber(CLBR_EAX)
|
|
|
|
/* Make sure as little as possible of this mess escapes. */
|
|
#undef PARAVIRT_CALL
|
|
#undef __PVOP_CALL
|
|
#undef __PVOP_VCALL
|
|
#undef PVOP_VCALL0
|
|
#undef PVOP_CALL0
|
|
#undef PVOP_VCALL1
|
|
#undef PVOP_CALL1
|
|
#undef PVOP_VCALL2
|
|
#undef PVOP_CALL2
|
|
#undef PVOP_VCALL3
|
|
#undef PVOP_CALL3
|
|
#undef PVOP_VCALL4
|
|
#undef PVOP_CALL4
|
|
|
|
#else /* __ASSEMBLY__ */
|
|
|
|
#define PARA_PATCH(off) ((off) / 4)
|
|
|
|
#define PARA_SITE(ptype, clobbers, ops) \
|
|
771:; \
|
|
ops; \
|
|
772:; \
|
|
.pushsection .parainstructions,"a"; \
|
|
.long 771b; \
|
|
.byte ptype; \
|
|
.byte 772b-771b; \
|
|
.short clobbers; \
|
|
.popsection
|
|
|
|
#define INTERRUPT_RETURN \
|
|
PARA_SITE(PARA_PATCH(PARAVIRT_iret), CLBR_NONE, \
|
|
jmp *%cs:paravirt_ops+PARAVIRT_iret)
|
|
|
|
#define DISABLE_INTERRUPTS(clobbers) \
|
|
PARA_SITE(PARA_PATCH(PARAVIRT_irq_disable), clobbers, \
|
|
pushl %eax; pushl %ecx; pushl %edx; \
|
|
call *%cs:paravirt_ops+PARAVIRT_irq_disable; \
|
|
popl %edx; popl %ecx; popl %eax) \
|
|
|
|
#define ENABLE_INTERRUPTS(clobbers) \
|
|
PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable), clobbers, \
|
|
pushl %eax; pushl %ecx; pushl %edx; \
|
|
call *%cs:paravirt_ops+PARAVIRT_irq_enable; \
|
|
popl %edx; popl %ecx; popl %eax)
|
|
|
|
#define ENABLE_INTERRUPTS_SYSEXIT \
|
|
PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable_sysexit), CLBR_NONE, \
|
|
jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit)
|
|
|
|
#define GET_CR0_INTO_EAX \
|
|
push %ecx; push %edx; \
|
|
call *paravirt_ops+PARAVIRT_read_cr0; \
|
|
pop %edx; pop %ecx
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
#endif /* CONFIG_PARAVIRT */
|
|
#endif /* __ASM_PARAVIRT_H */
|