267eb01a62
Add cpu_relax() to cmos_lock() inline function for faster operation on SMT CPUs and less power consumption on others in case of lock contention (which probably doesn't happen too often, so admittedly this patch is not too exciting). [akpm@linux-foundation.org: Include the header file for cpu_relax()] Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
98 lines
2.6 KiB
C
98 lines
2.6 KiB
C
/*
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* Machine dependent access functions for RTC registers.
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*/
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#ifndef _ASM_MC146818RTC_H
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#define _ASM_MC146818RTC_H
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/processor.h>
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#include <linux/mc146818rtc.h>
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#ifndef RTC_PORT
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#define RTC_PORT(x) (0x70 + (x))
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#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
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#endif
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#ifdef __HAVE_ARCH_CMPXCHG
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/*
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* This lock provides nmi access to the CMOS/RTC registers. It has some
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* special properties. It is owned by a CPU and stores the index register
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* currently being accessed (if owned). The idea here is that it works
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* like a normal lock (normally). However, in an NMI, the NMI code will
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* first check to see if its CPU owns the lock, meaning that the NMI
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* interrupted during the read/write of the device. If it does, it goes ahead
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* and performs the access and then restores the index register. If it does
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* not, it locks normally.
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*
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* Note that since we are working with NMIs, we need this lock even in
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* a non-SMP machine just to mark that the lock is owned.
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*
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* This only works with compare-and-swap. There is no other way to
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* atomically claim the lock and set the owner.
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*/
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#include <linux/smp.h>
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extern volatile unsigned long cmos_lock;
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/*
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* All of these below must be called with interrupts off, preempt
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* disabled, etc.
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*/
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static inline void lock_cmos(unsigned char reg)
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{
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unsigned long new;
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new = ((smp_processor_id()+1) << 8) | reg;
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for (;;) {
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if (cmos_lock) {
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cpu_relax();
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continue;
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}
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if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
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return;
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}
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}
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static inline void unlock_cmos(void)
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{
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cmos_lock = 0;
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}
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static inline int do_i_have_lock_cmos(void)
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{
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return (cmos_lock >> 8) == (smp_processor_id()+1);
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}
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static inline unsigned char current_lock_cmos_reg(void)
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{
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return cmos_lock & 0xff;
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}
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#define lock_cmos_prefix(reg) \
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do { \
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unsigned long cmos_flags; \
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local_irq_save(cmos_flags); \
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lock_cmos(reg)
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#define lock_cmos_suffix(reg) \
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unlock_cmos(); \
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local_irq_restore(cmos_flags); \
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} while (0)
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#else
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#define lock_cmos_prefix(reg) do {} while (0)
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#define lock_cmos_suffix(reg) do {} while (0)
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#define lock_cmos(reg)
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#define unlock_cmos()
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#define do_i_have_lock_cmos() 0
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#define current_lock_cmos_reg() 0
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#endif
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/*
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* The yet supported machines all access the RTC index register via
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* an ISA port access but the way to access the date register differs ...
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*/
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#define CMOS_READ(addr) rtc_cmos_read(addr)
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#define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
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unsigned char rtc_cmos_read(unsigned char addr);
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void rtc_cmos_write(unsigned char val, unsigned char addr);
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#define RTC_IRQ 8
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#endif /* _ASM_MC146818RTC_H */
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