![Hyuk Lee](/assets/img/avatar_default.png)
This patch adds support HSMMC for S5PV310 and S5PC210 and setup for HSMMC host controller and also related GPIO. At most 4 channel can be used at the same time. A user can configure SDHCI data bus as 8bit or 4bit. Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com> Signed-off-by: Jeongbae Seo <jeongbae.seo@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
153 lines
4.8 KiB
C
153 lines
4.8 KiB
C
/* linux/arch/arm/mach-s5pv310/setup-sdhci-gpio.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV310 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/card.h>
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#include <plat/gpio-cfg.h>
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#include <plat/regs-sdhci.h>
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#include <plat/sdhci.h>
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void s5pv310_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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/* Set all the necessary GPK0[0:1] pins to special-function 2 */
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for (gpio = S5PV310_GPK0(0); gpio < S5PV310_GPK0(2); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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switch (width) {
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case 8:
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for (gpio = S5PV310_GPK1(3); gpio <= S5PV310_GPK1(6); gpio++) {
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/* Data pin GPK1[3:6] to special-funtion 3 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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case 4:
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for (gpio = S5PV310_GPK0(3); gpio <= S5PV310_GPK0(6); gpio++) {
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/* Data pin GPK0[3:6] to special-funtion 2 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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default:
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break;
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}
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_cfgpin(S5PV310_GPK0(2), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PV310_GPK0(2), S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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}
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void s5pv310_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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/* Set all the necessary GPK1[0:1] pins to special-function 2 */
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for (gpio = S5PV310_GPK1(0); gpio < S5PV310_GPK1(2); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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for (gpio = S5PV310_GPK1(3); gpio <= S5PV310_GPK1(6); gpio++) {
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/* Data pin GPK1[3:6] to special-function 2 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_cfgpin(S5PV310_GPK1(2), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PV310_GPK1(2), S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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}
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void s5pv310_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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/* Set all the necessary GPK2[0:1] pins to special-function 2 */
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for (gpio = S5PV310_GPK2(0); gpio < S5PV310_GPK2(2); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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switch (width) {
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case 8:
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for (gpio = S5PV310_GPK3(3); gpio <= S5PV310_GPK3(6); gpio++) {
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/* Data pin GPK3[3:6] to special-function 3 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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case 4:
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for (gpio = S5PV310_GPK2(3); gpio <= S5PV310_GPK2(6); gpio++) {
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/* Data pin GPK2[3:6] to special-function 2 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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default:
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break;
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}
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_cfgpin(S5PV310_GPK2(2), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PV310_GPK2(2), S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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}
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void s5pv310_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
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{
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struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
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unsigned int gpio;
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/* Set all the necessary GPK3[0:1] pins to special-function 2 */
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for (gpio = S5PV310_GPK3(0); gpio < S5PV310_GPK3(2); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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for (gpio = S5PV310_GPK3(3); gpio <= S5PV310_GPK3(6); gpio++) {
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/* Data pin GPK3[3:6] to special-function 2 */
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
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s3c_gpio_cfgpin(S5PV310_GPK3(2), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PV310_GPK3(2), S3C_GPIO_PULL_UP);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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}
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