![Ben Hutchings](/assets/img/avatar_default.png)
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
352 lines
9.4 KiB
C
352 lines
9.4 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2006-2008 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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/*
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* Useful functions for working with MDIO clause 45 PHYs
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*/
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#include <linux/types.h>
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#include <linux/ethtool.h>
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#include <linux/delay.h>
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#include "net_driver.h"
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#include "mdio_10g.h"
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#include "boards.h"
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#include "workarounds.h"
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unsigned efx_mdio_id_oui(u32 id)
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{
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unsigned oui = 0;
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int i;
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/* The bits of the OUI are designated a..x, with a=0 and b variable.
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* In the id register c is the MSB but the OUI is conventionally
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* written as bytes h..a, p..i, x..q. Reorder the bits accordingly. */
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for (i = 0; i < 22; ++i)
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if (id & (1 << (i + 10)))
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oui |= 1 << (i ^ 7);
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return oui;
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}
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int efx_mdio_reset_mmd(struct efx_nic *port, int mmd,
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int spins, int spintime)
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{
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u32 ctrl;
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/* Catch callers passing values in the wrong units (or just silly) */
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EFX_BUG_ON_PARANOID(spins * spintime >= 5000);
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efx_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET);
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/* Wait for the reset bit to clear. */
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do {
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msleep(spintime);
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ctrl = efx_mdio_read(port, mmd, MDIO_CTRL1);
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spins--;
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} while (spins && (ctrl & MDIO_CTRL1_RESET));
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return spins ? spins : -ETIMEDOUT;
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}
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static int efx_mdio_check_mmd(struct efx_nic *efx, int mmd, int fault_fatal)
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{
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int status;
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if (LOOPBACK_INTERNAL(efx))
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return 0;
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if (mmd != MDIO_MMD_AN) {
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/* Read MMD STATUS2 to check it is responding. */
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status = efx_mdio_read(efx, mmd, MDIO_STAT2);
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if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) {
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EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd);
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return -EIO;
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}
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}
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/* Read MMD STATUS 1 to check for fault. */
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status = efx_mdio_read(efx, mmd, MDIO_STAT1);
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if (status & MDIO_STAT1_FAULT) {
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if (fault_fatal) {
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EFX_ERR(efx, "PHY MMD %d reporting fatal"
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" fault: status %x\n", mmd, status);
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return -EIO;
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} else {
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EFX_LOG(efx, "PHY MMD %d reporting status"
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" %x (expected)\n", mmd, status);
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}
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}
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return 0;
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}
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/* This ought to be ridiculous overkill. We expect it to fail rarely */
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#define MDIO45_RESET_TIME 1000 /* ms */
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#define MDIO45_RESET_ITERS 100
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int efx_mdio_wait_reset_mmds(struct efx_nic *efx, unsigned int mmd_mask)
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{
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const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS;
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int tries = MDIO45_RESET_ITERS;
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int rc = 0;
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int in_reset;
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while (tries) {
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int mask = mmd_mask;
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int mmd = 0;
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int stat;
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in_reset = 0;
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while (mask) {
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if (mask & 1) {
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stat = efx_mdio_read(efx, mmd, MDIO_CTRL1);
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if (stat < 0) {
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EFX_ERR(efx, "failed to read status of"
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" MMD %d\n", mmd);
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return -EIO;
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}
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if (stat & MDIO_CTRL1_RESET)
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in_reset |= (1 << mmd);
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}
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mask = mask >> 1;
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mmd++;
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}
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if (!in_reset)
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break;
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tries--;
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msleep(spintime);
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}
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if (in_reset != 0) {
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EFX_ERR(efx, "not all MMDs came out of reset in time."
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" MMDs still in reset: %x\n", in_reset);
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rc = -ETIMEDOUT;
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}
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return rc;
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}
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int efx_mdio_check_mmds(struct efx_nic *efx,
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unsigned int mmd_mask, unsigned int fatal_mask)
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{
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int mmd = 0, probe_mmd, devs1, devs2;
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u32 devices;
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/* Historically we have probed the PHYXS to find out what devices are
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* present,but that doesn't work so well if the PHYXS isn't expected
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* to exist, if so just find the first item in the list supplied. */
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probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS :
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__ffs(mmd_mask);
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/* Check all the expected MMDs are present */
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devs1 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS1);
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devs2 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS2);
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if (devs1 < 0 || devs2 < 0) {
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EFX_ERR(efx, "failed to read devices present\n");
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return -EIO;
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}
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devices = devs1 | (devs2 << 16);
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if ((devices & mmd_mask) != mmd_mask) {
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EFX_ERR(efx, "required MMDs not present: got %x, "
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"wanted %x\n", devices, mmd_mask);
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return -ENODEV;
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}
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EFX_TRACE(efx, "Devices present: %x\n", devices);
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/* Check all required MMDs are responding and happy. */
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while (mmd_mask) {
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if (mmd_mask & 1) {
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int fault_fatal = fatal_mask & 1;
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if (efx_mdio_check_mmd(efx, mmd, fault_fatal))
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return -EIO;
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}
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mmd_mask = mmd_mask >> 1;
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fatal_mask = fatal_mask >> 1;
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mmd++;
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}
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return 0;
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}
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bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
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{
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/* If the port is in loopback, then we should only consider a subset
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* of mmd's */
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if (LOOPBACK_INTERNAL(efx))
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return true;
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else if (efx->loopback_mode == LOOPBACK_NETWORK)
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return false;
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else if (efx_phy_mode_disabled(efx->phy_mode))
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return false;
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else if (efx->loopback_mode == LOOPBACK_PHYXS)
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mmd_mask &= ~(MDIO_DEVS_PHYXS |
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MDIO_DEVS_PCS |
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MDIO_DEVS_PMAPMD |
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MDIO_DEVS_AN);
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else if (efx->loopback_mode == LOOPBACK_PCS)
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mmd_mask &= ~(MDIO_DEVS_PCS |
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MDIO_DEVS_PMAPMD |
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MDIO_DEVS_AN);
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else if (efx->loopback_mode == LOOPBACK_PMAPMD)
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mmd_mask &= ~(MDIO_DEVS_PMAPMD |
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MDIO_DEVS_AN);
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return mdio45_links_ok(&efx->mdio, mmd_mask);
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}
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void efx_mdio_transmit_disable(struct efx_nic *efx)
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{
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efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
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MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL,
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efx->phy_mode & PHY_MODE_TX_DISABLED);
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}
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void efx_mdio_phy_reconfigure(struct efx_nic *efx)
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{
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efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
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MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK,
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efx->loopback_mode == LOOPBACK_PMAPMD);
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efx_mdio_set_flag(efx, MDIO_MMD_PCS,
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MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK,
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efx->loopback_mode == LOOPBACK_PCS);
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efx_mdio_set_flag(efx, MDIO_MMD_PHYXS,
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MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK,
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efx->loopback_mode == LOOPBACK_NETWORK);
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}
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static void efx_mdio_set_mmd_lpower(struct efx_nic *efx,
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int lpower, int mmd)
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{
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int stat = efx_mdio_read(efx, mmd, MDIO_STAT1);
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EFX_TRACE(efx, "Setting low power mode for MMD %d to %d\n",
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mmd, lpower);
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if (stat & MDIO_STAT1_LPOWERABLE) {
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efx_mdio_set_flag(efx, mmd, MDIO_CTRL1,
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MDIO_CTRL1_LPOWER, lpower);
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}
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}
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void efx_mdio_set_mmds_lpower(struct efx_nic *efx,
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int low_power, unsigned int mmd_mask)
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{
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int mmd = 0;
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mmd_mask &= ~MDIO_DEVS_AN;
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while (mmd_mask) {
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if (mmd_mask & 1)
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efx_mdio_set_mmd_lpower(efx, low_power, mmd);
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mmd_mask = (mmd_mask >> 1);
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mmd++;
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}
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}
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/**
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* efx_mdio_set_settings - Set (some of) the PHY settings over MDIO.
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* @efx: Efx NIC
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* @ecmd: New settings
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*/
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int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
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{
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struct ethtool_cmd prev;
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u32 required;
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int reg;
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efx->phy_op->get_settings(efx, &prev);
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if (ecmd->advertising == prev.advertising &&
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ecmd->speed == prev.speed &&
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ecmd->duplex == prev.duplex &&
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ecmd->port == prev.port &&
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ecmd->autoneg == prev.autoneg)
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return 0;
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/* We can only change these settings for -T PHYs */
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if (prev.port != PORT_TP || ecmd->port != PORT_TP)
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return -EINVAL;
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/* Check that PHY supports these settings */
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if (ecmd->autoneg) {
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required = SUPPORTED_Autoneg;
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} else if (ecmd->duplex) {
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switch (ecmd->speed) {
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case SPEED_10: required = SUPPORTED_10baseT_Full; break;
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case SPEED_100: required = SUPPORTED_100baseT_Full; break;
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default: return -EINVAL;
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}
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} else {
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switch (ecmd->speed) {
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case SPEED_10: required = SUPPORTED_10baseT_Half; break;
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case SPEED_100: required = SUPPORTED_100baseT_Half; break;
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default: return -EINVAL;
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}
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}
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required |= ecmd->advertising;
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if (required & ~prev.supported)
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return -EINVAL;
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if (ecmd->autoneg) {
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bool xnp = (ecmd->advertising & ADVERTISED_10000baseT_Full
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|| EFX_WORKAROUND_13204(efx));
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/* Set up the base page */
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reg = ADVERTISE_CSMA;
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if (ecmd->advertising & ADVERTISED_10baseT_Half)
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reg |= ADVERTISE_10HALF;
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if (ecmd->advertising & ADVERTISED_10baseT_Full)
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reg |= ADVERTISE_10FULL;
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if (ecmd->advertising & ADVERTISED_100baseT_Half)
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reg |= ADVERTISE_100HALF;
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if (ecmd->advertising & ADVERTISED_100baseT_Full)
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reg |= ADVERTISE_100FULL;
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if (xnp)
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reg |= ADVERTISE_RESV;
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else if (ecmd->advertising & (ADVERTISED_1000baseT_Half |
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ADVERTISED_1000baseT_Full))
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reg |= ADVERTISE_NPAGE;
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reg |= mii_advertise_flowctrl(efx->wanted_fc);
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efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
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/* Set up the (extended) next page if necessary */
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if (efx->phy_op->set_npage_adv)
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efx->phy_op->set_npage_adv(efx, ecmd->advertising);
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/* Enable and restart AN */
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reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
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reg |= MDIO_AN_CTRL1_ENABLE;
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if (!(EFX_WORKAROUND_15195(efx) &&
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LOOPBACK_MASK(efx) & efx->phy_op->loopbacks))
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reg |= MDIO_AN_CTRL1_RESTART;
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if (xnp)
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reg |= MDIO_AN_CTRL1_XNP;
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else
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reg &= ~MDIO_AN_CTRL1_XNP;
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efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
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} else {
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/* Disable AN */
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efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_CTRL1,
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MDIO_AN_CTRL1_ENABLE, false);
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/* Set the basic control bits */
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reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1);
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reg &= ~(MDIO_CTRL1_SPEEDSEL | MDIO_CTRL1_FULLDPLX);
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if (ecmd->speed == SPEED_100)
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reg |= MDIO_PMA_CTRL1_SPEED100;
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if (ecmd->duplex)
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reg |= MDIO_CTRL1_FULLDPLX;
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efx_mdio_write(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1, reg);
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}
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return 0;
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}
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enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx)
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{
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int lpa;
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if (!(efx->phy_op->mmds & MDIO_DEVS_AN))
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return efx->wanted_fc;
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lpa = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA);
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return efx_fc_resolve(efx->wanted_fc, lpa);
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}
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