![Zwane Mwaikambo](/assets/img/avatar_default.png)
(The i386 CPU hotplug patch provides infrastructure for some work which Pavel is doing as well as for ACPI S3 (suspend-to-RAM) work which Li Shaohua <shaohua.li@intel.com> is doing) The following provides i386 architecture support for safely unregistering and registering processors during runtime, updated for the current -mm tree. In order to avoid dumping cpu hotplug code into kernel/irq/* i dropped the cpu_online check in do_IRQ() by modifying fixup_irqs(). The difference being that on cpu offline, fixup_irqs() is called before we clear the cpu from cpu_online_map and a long delay in order to ensure that we never have any queued external interrupts on the APICs. There are additional changes to s390 and ppc64 to account for this change. 1) Add CONFIG_HOTPLUG_CPU 2) disable local APIC timer on dead cpus. 3) Disable preempt around irq balancing to prevent CPUs going down. 4) Print irq stats for all possible cpus. 5) Debugging check for interrupts on offline cpus. 6) Hacky fixup_irqs() to redirect irqs when cpus go off/online. 7) play_dead() for offline cpus to spin inside. 8) Handle offline cpus set in flush_tlb_others(). 9) Grab lock earlier in smp_call_function() to prevent CPUs going down. 10) Implement __cpu_disable() and __cpu_die(). 11) Enable local interrupts in cpu_enable() after fixup_irqs() 12) Don't fiddle with NMI on dead cpu, but leave intact on other cpus. 13) Program IRQ affinity whilst cpu is still in cpu_online_map on offline. Signed-off-by: Zwane Mwaikambo <zwane@linuxpower.ca> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
95 lines
2.2 KiB
C
95 lines
2.2 KiB
C
#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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/*
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* We need the APIC definitions automatically as part of 'smp.h'
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*/
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#ifndef __ASSEMBLY__
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#endif
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#ifdef CONFIG_X86_LOCAL_APIC
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#ifndef __ASSEMBLY__
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#include <asm/fixmap.h>
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#include <asm/bitops.h>
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#include <asm/mpspec.h>
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#ifdef CONFIG_X86_IO_APIC
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#include <asm/io_apic.h>
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#endif
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#include <asm/apic.h>
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#endif
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#endif
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#define BAD_APICID 0xFFu
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#ifdef CONFIG_SMP
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#ifndef __ASSEMBLY__
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/*
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* Private routines/data
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*/
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extern void smp_alloc_memory(void);
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extern int pic_mode;
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extern int smp_num_siblings;
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extern cpumask_t cpu_sibling_map[];
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extern cpumask_t cpu_core_map[];
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extern void smp_flush_tlb(void);
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extern void smp_message_irq(int cpl, void *dev_id, struct pt_regs *regs);
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extern void smp_invalidate_rcv(void); /* Process an NMI */
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extern void (*mtrr_hook) (void);
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extern void zap_low_mappings (void);
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#define MAX_APICID 256
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extern u8 x86_cpu_to_apicid[];
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/*
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* This function is needed by all SMP systems. It must _always_ be valid
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* from the initial startup. We map APIC_BASE very early in page_setup(),
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* so this is correct in the x86 case.
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*/
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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extern cpumask_t cpu_callout_map;
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extern cpumask_t cpu_callin_map;
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#define cpu_possible_map cpu_callout_map
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/* We don't mark CPUs online until __cpu_up(), so we need another measure */
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static inline int num_booting_cpus(void)
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{
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return cpus_weight(cpu_callout_map);
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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#ifdef APIC_DEFINITION
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extern int hard_smp_processor_id(void);
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#else
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#include <mach_apicdef.h>
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static inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(unsigned long *)(APIC_BASE+APIC_ID));
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}
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#endif
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static __inline int logical_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
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}
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#endif
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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#endif /* !__ASSEMBLY__ */
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#define NO_PROC_ID 0xFF /* No processor magic marker */
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#endif
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#endif
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