![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
448 lines
11 KiB
C
448 lines
11 KiB
C
/*
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* Copyright (C) 2006-2007 PA Semi, Inc
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*
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* Authors: Kip Walker, PA Semi
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* Olof Johansson, PA Semi
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*
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* Maintained by: Olof Johansson <olof@lixom.net>
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*
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* Based on arch/powerpc/platforms/maple/setup.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/console.h>
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#include <linux/pci.h>
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#include <linux/of_platform.h>
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#include <linux/gfp.h>
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#include <asm/prom.h>
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#include <asm/system.h>
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#include <asm/iommu.h>
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#include <asm/machdep.h>
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#include <asm/mpic.h>
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#include <asm/smp.h>
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#include <asm/time.h>
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#include <asm/mmu.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/cistpl.h>
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#include <pcmcia/ds.h>
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#include "pasemi.h"
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/* SDC reset register, must be pre-mapped at reset time */
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static void __iomem *reset_reg;
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/* Various error status registers, must be pre-mapped at MCE time */
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#define MAX_MCE_REGS 32
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struct mce_regs {
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char *name;
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void __iomem *addr;
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};
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static struct mce_regs mce_regs[MAX_MCE_REGS];
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static int num_mce_regs;
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static int nmi_virq = NO_IRQ;
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static void pas_restart(char *cmd)
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{
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/* Need to put others cpu in hold loop so they're not sleeping */
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smp_send_stop();
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udelay(10000);
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printk("Restarting...\n");
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while (1)
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out_le32(reset_reg, 0x6000000);
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}
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#ifdef CONFIG_SMP
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static arch_spinlock_t timebase_lock;
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static unsigned long timebase;
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static void __devinit pas_give_timebase(void)
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{
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unsigned long flags;
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local_irq_save(flags);
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hard_irq_disable();
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arch_spin_lock(&timebase_lock);
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mtspr(SPRN_TBCTL, TBCTL_FREEZE);
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isync();
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timebase = get_tb();
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arch_spin_unlock(&timebase_lock);
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while (timebase)
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barrier();
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mtspr(SPRN_TBCTL, TBCTL_RESTART);
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local_irq_restore(flags);
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}
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static void __devinit pas_take_timebase(void)
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{
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while (!timebase)
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smp_rmb();
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arch_spin_lock(&timebase_lock);
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set_tb(timebase >> 32, timebase & 0xffffffff);
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timebase = 0;
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arch_spin_unlock(&timebase_lock);
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}
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struct smp_ops_t pas_smp_ops = {
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.probe = smp_mpic_probe,
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.message_pass = smp_mpic_message_pass,
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.kick_cpu = smp_generic_kick_cpu,
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.setup_cpu = smp_mpic_setup_cpu,
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.give_timebase = pas_give_timebase,
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.take_timebase = pas_take_timebase,
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};
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#endif /* CONFIG_SMP */
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void __init pas_setup_arch(void)
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{
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#ifdef CONFIG_SMP
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/* Setup SMP callback */
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smp_ops = &pas_smp_ops;
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#endif
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/* Lookup PCI hosts */
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pas_pci_init();
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#endif
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/* Remap SDC register for doing reset */
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/* XXXOJN This should maybe come out of the device tree */
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reset_reg = ioremap(0xfc101100, 4);
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}
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static int __init pas_setup_mce_regs(void)
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{
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struct pci_dev *dev;
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int reg;
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/* Remap various SoC status registers for use by the MCE handler */
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reg = 0;
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dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, NULL);
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while (dev && reg < MAX_MCE_REGS) {
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mce_regs[reg].name = kasprintf(GFP_KERNEL,
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"mc%d_mcdebug_errsta", reg);
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mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x730);
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dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa00a, dev);
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reg++;
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}
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dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
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if (dev && reg+4 < MAX_MCE_REGS) {
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mce_regs[reg].name = "iobdbg_IntStatus1";
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mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x438);
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reg++;
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mce_regs[reg].name = "iobdbg_IOCTbusIntDbgReg";
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mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x454);
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reg++;
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mce_regs[reg].name = "iobiom_IntStatus";
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mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc10);
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reg++;
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mce_regs[reg].name = "iobiom_IntDbgReg";
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mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0xc1c);
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reg++;
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}
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dev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa009, NULL);
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if (dev && reg+2 < MAX_MCE_REGS) {
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mce_regs[reg].name = "l2csts_IntStatus";
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mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x200);
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reg++;
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mce_regs[reg].name = "l2csts_Cnt";
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mce_regs[reg].addr = pasemi_pci_getcfgaddr(dev, 0x214);
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reg++;
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}
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num_mce_regs = reg;
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return 0;
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}
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machine_device_initcall(pasemi, pas_setup_mce_regs);
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static __init void pas_init_IRQ(void)
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{
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struct device_node *np;
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struct device_node *root, *mpic_node;
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unsigned long openpic_addr;
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const unsigned int *opprop;
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int naddr, opplen;
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int mpic_flags;
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const unsigned int *nmiprop;
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struct mpic *mpic;
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mpic_node = NULL;
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for_each_node_by_type(np, "interrupt-controller")
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if (of_device_is_compatible(np, "open-pic")) {
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mpic_node = np;
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break;
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}
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if (!mpic_node)
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for_each_node_by_type(np, "open-pic") {
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mpic_node = np;
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break;
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}
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if (!mpic_node) {
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printk(KERN_ERR
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"Failed to locate the MPIC interrupt controller\n");
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return;
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}
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/* Find address list in /platform-open-pic */
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root = of_find_node_by_path("/");
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naddr = of_n_addr_cells(root);
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opprop = of_get_property(root, "platform-open-pic", &opplen);
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if (!opprop) {
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printk(KERN_ERR "No platform-open-pic property.\n");
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of_node_put(root);
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return;
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}
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openpic_addr = of_read_number(opprop, naddr);
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printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
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mpic_flags = MPIC_PRIMARY | MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
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nmiprop = of_get_property(mpic_node, "nmi-source", NULL);
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if (nmiprop)
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mpic_flags |= MPIC_ENABLE_MCK;
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mpic = mpic_alloc(mpic_node, openpic_addr,
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mpic_flags, 0, 0, "PASEMI-OPIC");
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BUG_ON(!mpic);
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mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
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mpic_init(mpic);
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/* The NMI/MCK source needs to be prio 15 */
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if (nmiprop) {
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nmi_virq = irq_create_mapping(NULL, *nmiprop);
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mpic_irq_set_priority(nmi_virq, 15);
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set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING);
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mpic_unmask_irq(nmi_virq);
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}
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of_node_put(mpic_node);
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of_node_put(root);
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}
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static void __init pas_progress(char *s, unsigned short hex)
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{
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printk("[%04x] : %s\n", hex, s ? s : "");
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}
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static int pas_machine_check_handler(struct pt_regs *regs)
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{
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int cpu = smp_processor_id();
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unsigned long srr0, srr1, dsisr;
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int dump_slb = 0;
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int i;
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srr0 = regs->nip;
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srr1 = regs->msr;
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if (nmi_virq != NO_IRQ && mpic_get_mcirq() == nmi_virq) {
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printk(KERN_ERR "NMI delivered\n");
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debugger(regs);
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mpic_end_irq(nmi_virq);
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goto out;
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}
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dsisr = mfspr(SPRN_DSISR);
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printk(KERN_ERR "Machine Check on CPU %d\n", cpu);
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printk(KERN_ERR "SRR0 0x%016lx SRR1 0x%016lx\n", srr0, srr1);
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printk(KERN_ERR "DSISR 0x%016lx DAR 0x%016lx\n", dsisr, regs->dar);
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printk(KERN_ERR "BER 0x%016lx MER 0x%016lx\n", mfspr(SPRN_PA6T_BER),
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mfspr(SPRN_PA6T_MER));
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printk(KERN_ERR "IER 0x%016lx DER 0x%016lx\n", mfspr(SPRN_PA6T_IER),
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mfspr(SPRN_PA6T_DER));
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printk(KERN_ERR "Cause:\n");
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if (srr1 & 0x200000)
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printk(KERN_ERR "Signalled by SDC\n");
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if (srr1 & 0x100000) {
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printk(KERN_ERR "Load/Store detected error:\n");
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if (dsisr & 0x8000)
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printk(KERN_ERR "D-cache ECC double-bit error or bus error\n");
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if (dsisr & 0x4000)
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printk(KERN_ERR "LSU snoop response error\n");
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if (dsisr & 0x2000) {
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printk(KERN_ERR "MMU SLB multi-hit or invalid B field\n");
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dump_slb = 1;
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}
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if (dsisr & 0x1000)
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printk(KERN_ERR "Recoverable Duptags\n");
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if (dsisr & 0x800)
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printk(KERN_ERR "Recoverable D-cache parity error count overflow\n");
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if (dsisr & 0x400)
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printk(KERN_ERR "TLB parity error count overflow\n");
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}
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if (srr1 & 0x80000)
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printk(KERN_ERR "Bus Error\n");
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if (srr1 & 0x40000) {
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printk(KERN_ERR "I-side SLB multiple hit\n");
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dump_slb = 1;
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}
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if (srr1 & 0x20000)
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printk(KERN_ERR "I-cache parity error hit\n");
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if (num_mce_regs == 0)
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printk(KERN_ERR "No MCE registers mapped yet, can't dump\n");
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else
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printk(KERN_ERR "SoC debug registers:\n");
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for (i = 0; i < num_mce_regs; i++)
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printk(KERN_ERR "%s: 0x%08x\n", mce_regs[i].name,
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in_le32(mce_regs[i].addr));
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if (dump_slb) {
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unsigned long e, v;
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int i;
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printk(KERN_ERR "slb contents:\n");
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for (i = 0; i < mmu_slb_size; i++) {
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asm volatile("slbmfee %0,%1" : "=r" (e) : "r" (i));
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asm volatile("slbmfev %0,%1" : "=r" (v) : "r" (i));
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printk(KERN_ERR "%02d %016lx %016lx\n", i, e, v);
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}
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}
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out:
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/* SRR1[62] is from MSR[62] if recoverable, so pass that back */
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return !!(srr1 & 0x2);
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}
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static void __init pas_init_early(void)
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{
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iommu_init_early_pasemi();
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}
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#ifdef CONFIG_PCMCIA
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static int pcmcia_notify(struct notifier_block *nb, unsigned long action,
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void *data)
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{
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struct device *dev = data;
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struct device *parent;
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struct pcmcia_device *pdev = to_pcmcia_dev(dev);
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/* We are only intereted in device addition */
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if (action != BUS_NOTIFY_ADD_DEVICE)
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return 0;
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parent = pdev->socket->dev.parent;
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/* We know electra_cf devices will always have of_node set, since
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* electra_cf is an of_platform driver.
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*/
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if (!parent->archdata.of_node)
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return 0;
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if (!of_device_is_compatible(parent->archdata.of_node, "electra-cf"))
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return 0;
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/* We use the direct ops for localbus */
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dev->archdata.dma_ops = &dma_direct_ops;
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return 0;
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}
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static struct notifier_block pcmcia_notifier = {
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.notifier_call = pcmcia_notify,
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};
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static inline void pasemi_pcmcia_init(void)
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{
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extern struct bus_type pcmcia_bus_type;
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bus_register_notifier(&pcmcia_bus_type, &pcmcia_notifier);
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}
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#else
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static inline void pasemi_pcmcia_init(void)
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{
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}
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#endif
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static struct of_device_id pasemi_bus_ids[] = {
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/* Unfortunately needed for legacy firmwares */
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{ .type = "localbus", },
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{ .type = "sdc", },
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/* These are the proper entries, which newer firmware uses */
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{ .compatible = "pasemi,localbus", },
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{ .compatible = "pasemi,sdc", },
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{},
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};
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static int __init pasemi_publish_devices(void)
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{
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pasemi_pcmcia_init();
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/* Publish OF platform devices for SDC and other non-PCI devices */
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of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
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return 0;
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}
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machine_device_initcall(pasemi, pasemi_publish_devices);
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/*
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* Called very early, MMU is off, device-tree isn't unflattened
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*/
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static int __init pas_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (!of_flat_dt_is_compatible(root, "PA6T-1682M") &&
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!of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
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return 0;
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hpte_init_native();
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alloc_iobmap_l2();
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return 1;
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}
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define_machine(pasemi) {
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.name = "PA Semi PWRficient",
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.probe = pas_probe,
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.setup_arch = pas_setup_arch,
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.init_early = pas_init_early,
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.init_IRQ = pas_init_IRQ,
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.get_irq = mpic_get_irq,
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.restart = pas_restart,
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.get_boot_time = pas_get_boot_time,
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.calibrate_decr = generic_calibrate_decr,
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.progress = pas_progress,
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.machine_check_exception = pas_machine_check_handler,
|
|
};
|