![Niklaus Giger](/assets/img/avatar_default.png)
Adds support for a HCU4 PPC405GPr based board from Netstal Maschinen AG. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
169 lines
3.7 KiB
Text
169 lines
3.7 KiB
Text
/*
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* Device Tree Source for Netstal Maschinen HCU4
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* based on the IBM Walnut
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*
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* Copyright 2008
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* Niklaus Giger <niklaus.giger@member.fsf.org>
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*
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* Copyright 2007 IBM Corp.
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* Josh Boyer <jwboyer@linux.vnet.ibm.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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/ {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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model = "netstal,hcu4";
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compatible = "netstal,hcu4";
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dcr-parent = <0x1>;
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aliases {
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ethernet0 = "/plb/opb/ethernet@ef600800";
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serial0 = "/plb/opb/serial@ef600300";
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};
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cpus {
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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cpu@0 {
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device_type = "cpu";
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model = "PowerPC,405GPr";
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reg = <0x0>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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timebase-frequency = <0x0>; /* Filled in by U-Boot */
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i-cache-line-size = <0x20>;
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d-cache-line-size = <0x20>;
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i-cache-size = <0x4000>;
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d-cache-size = <0x4000>;
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dcr-controller;
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dcr-access-method = "native";
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linux,phandle = <0x1>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x0>; /* Filled in by U-Boot */
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};
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UIC0: interrupt-controller {
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compatible = "ibm,uic";
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interrupt-controller;
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cell-index = <0x0>;
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dcr-reg = <0xc0 0x9>;
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#address-cells = <0x0>;
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#size-cells = <0x0>;
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#interrupt-cells = <0x2>;
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linux,phandle = <0x2>;
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};
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plb {
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compatible = "ibm,plb3";
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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ranges;
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clock-frequency = <0x0>; /* Filled in by U-Boot */
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SDRAM0: memory-controller {
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compatible = "ibm,sdram-405gp";
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dcr-reg = <0x10 0x2>;
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};
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MAL: mcmal {
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compatible = "ibm,mcmal-405gp", "ibm,mcmal";
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dcr-reg = <0x180 0x62>;
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num-tx-chans = <0x1>;
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num-rx-chans = <0x1>;
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interrupt-parent = <0x2>;
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interrupts = <0xb 0x4 0xc 0x4 0xa 0x4 0xd 0x4 0xe 0x4>;
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linux,phandle = <0x3>;
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};
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POB0: opb {
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compatible = "ibm,opb-405gp", "ibm,opb";
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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ranges = <0xef600000 0xef600000 0xa00000>;
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dcr-reg = <0xa0 0x5>;
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clock-frequency = <0x0>; /* Filled in by U-Boot */
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600300 0x8>;
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virtual-reg = <0xef600300>;
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clock-frequency = <0x0>;/* Filled in by U-Boot */
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current-speed = <0>; /* Filled in by U-Boot */
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interrupt-parent = <0x2>;
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interrupts = <0x0 0x4>;
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};
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IIC: i2c@ef600500 {
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compatible = "ibm,iic-405gp", "ibm,iic";
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reg = <0xef600500 0x11>;
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interrupt-parent = <0x2>;
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interrupts = <0x2 0x4>;
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};
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GPIO: gpio@ef600700 {
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compatible = "ibm,gpio-405gp";
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reg = <0xef600700 0x20>;
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};
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EMAC: ethernet@ef600800 {
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device_type = "network";
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compatible = "ibm,emac-405gp", "ibm,emac";
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interrupt-parent = <0x2>;
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interrupts = <0xf 0x4 0x9 0x4>;
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local-mac-address = [00 00 00 00 00 00];
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reg = <0xef600800 0x70>;
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mal-device = <0x3>;
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mal-tx-channel = <0x0>;
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mal-rx-channel = <0x0>;
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cell-index = <0x0>;
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max-frame-size = <0x5dc>;
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rx-fifo-size = <0x1000>;
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tx-fifo-size = <0x800>;
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phy-mode = "rmii";
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phy-map = <0x1>;
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};
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};
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EBC0: ebc {
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compatible = "ibm,ebc-405gp", "ibm,ebc";
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dcr-reg = <0x12 0x2>;
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#address-cells = <0x2>;
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#size-cells = <0x1>;
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clock-frequency = <0x0>; /* Filled in by U-Boot */
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sram@0,0 {
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reg = <0x0 0x0 0x80000>;
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};
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flash@0,80000 {
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compatible = "jedec-flash";
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bank-width = <0x1>;
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reg = <0x0 0x80000 0x80000>;
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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partition@0 {
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label = "OpenBIOS";
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reg = <0x0 0x80000>;
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read-only;
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};
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};
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};
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};
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chosen {
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linux,stdout-path = "/plb/opb/serial@ef600300";
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};
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};
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