![Yoann Padioleau](/assets/img/avatar_default.png)
Transform some calls to kmalloc/memset to a single kzalloc (or kcalloc). Here is a short excerpt of the semantic patch performing this transformation: @@ type T2; expression x; identifier f,fld; expression E; expression E1,E2; expression e1,e2,e3,y; statement S; @@ x = - kmalloc + kzalloc (E1,E2) ... when != \(x->fld=E;\|y=f(...,x,...);\|f(...,x,...);\|x=E;\|while(...) S\|for(e1;e2;e3) S\) - memset((T2)x,0,E1); @@ expression E1,E2,E3; @@ - kzalloc(E1 * E2,E3) + kcalloc(E1,E2,E3) [akpm@linux-foundation.org: get kcalloc args the right way around] Signed-off-by: Yoann Padioleau <padator@wanadoo.fr> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Acked-by: Russell King <rmk@arm.linux.org.uk> Cc: Bryan Wu <bryan.wu@analog.com> Acked-by: Jiri Slaby <jirislaby@gmail.com> Cc: Dave Airlie <airlied@linux.ie> Acked-by: Roland Dreier <rolandd@cisco.com> Cc: Jiri Kosina <jkosina@suse.cz> Acked-by: Dmitry Torokhov <dtor@mail.ru> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Mauro Carvalho Chehab <mchehab@infradead.org> Acked-by: Pierre Ossman <drzeus-list@drzeus.cx> Cc: Jeff Garzik <jeff@garzik.org> Cc: "David S. Miller" <davem@davemloft.net> Acked-by: Greg KH <greg@kroah.com> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
1024 lines
27 KiB
C
1024 lines
27 KiB
C
/*
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* OHCI HCD (Host Controller Driver) for USB.
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*
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
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*
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* [ Initialisation is based on Linus' ]
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* [ uhci code and gregs ohci fragments ]
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* [ (C) Copyright 1999 Linus Torvalds ]
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* [ (C) Copyright 1999 Gregory P. Smith]
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*
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*
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* OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
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* interfaces (though some non-x86 Intel chips use it). It supports
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* smarter hardware than UHCI. A download link for the spec available
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* through the http://www.usb.org website.
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*
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* This file is licenced under the GPL.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/timer.h>
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#include <linux/list.h>
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#include <linux/usb.h>
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#include <linux/usb/otg.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmapool.h>
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#include <linux/reboot.h>
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#include <linux/workqueue.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/unaligned.h>
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#include <asm/byteorder.h>
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#include "../core/hcd.h"
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#define DRIVER_VERSION "2006 August 04"
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#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
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#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
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/*-------------------------------------------------------------------------*/
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#undef OHCI_VERBOSE_DEBUG /* not always helpful */
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/* For initializing controller (mask in an HCFS mode too) */
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#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
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#define OHCI_INTR_INIT \
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(OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
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| OHCI_INTR_RD | OHCI_INTR_WDH)
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#ifdef __hppa__
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/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
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#define IR_DISABLE
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#endif
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#ifdef CONFIG_ARCH_OMAP
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/* OMAP doesn't support IR (no SMM; not needed) */
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#define IR_DISABLE
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#endif
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/*-------------------------------------------------------------------------*/
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static const char hcd_name [] = "ohci_hcd";
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#define STATECHANGE_DELAY msecs_to_jiffies(300)
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#include "ohci.h"
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static void ohci_dump (struct ohci_hcd *ohci, int verbose);
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static int ohci_init (struct ohci_hcd *ohci);
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static void ohci_stop (struct usb_hcd *hcd);
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static int ohci_restart (struct ohci_hcd *ohci);
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static void ohci_quirk_nec_worker (struct work_struct *work);
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#include "ohci-hub.c"
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#include "ohci-dbg.c"
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#include "ohci-mem.c"
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#include "ohci-q.c"
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/*
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* On architectures with edge-triggered interrupts we must never return
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* IRQ_NONE.
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*/
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#if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
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#define IRQ_NOTMINE IRQ_HANDLED
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#else
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#define IRQ_NOTMINE IRQ_NONE
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#endif
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/* Some boards misreport power switching/overcurrent */
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static int distrust_firmware = 1;
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module_param (distrust_firmware, bool, 0);
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MODULE_PARM_DESC (distrust_firmware,
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"true to distrust firmware power/overcurrent setup");
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/* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
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static int no_handshake = 0;
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module_param (no_handshake, bool, 0);
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MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
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/*-------------------------------------------------------------------------*/
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/*
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* queue up an urb for anything except the root hub
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*/
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static int ohci_urb_enqueue (
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struct usb_hcd *hcd,
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struct usb_host_endpoint *ep,
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struct urb *urb,
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gfp_t mem_flags
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) {
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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struct ed *ed;
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urb_priv_t *urb_priv;
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unsigned int pipe = urb->pipe;
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int i, size = 0;
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unsigned long flags;
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int retval = 0;
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#ifdef OHCI_VERBOSE_DEBUG
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urb_print (urb, "SUB", usb_pipein (pipe));
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#endif
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/* every endpoint has a ed, locate and maybe (re)initialize it */
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if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
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return -ENOMEM;
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/* for the private part of the URB we need the number of TDs (size) */
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switch (ed->type) {
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case PIPE_CONTROL:
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/* td_submit_urb() doesn't yet handle these */
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if (urb->transfer_buffer_length > 4096)
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return -EMSGSIZE;
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/* 1 TD for setup, 1 for ACK, plus ... */
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size = 2;
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/* FALLTHROUGH */
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// case PIPE_INTERRUPT:
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// case PIPE_BULK:
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default:
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/* one TD for every 4096 Bytes (can be upto 8K) */
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size += urb->transfer_buffer_length / 4096;
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/* ... and for any remaining bytes ... */
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if ((urb->transfer_buffer_length % 4096) != 0)
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size++;
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/* ... and maybe a zero length packet to wrap it up */
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if (size == 0)
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size++;
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else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
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&& (urb->transfer_buffer_length
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% usb_maxpacket (urb->dev, pipe,
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usb_pipeout (pipe))) == 0)
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size++;
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break;
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case PIPE_ISOCHRONOUS: /* number of packets from URB */
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size = urb->number_of_packets;
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break;
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}
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/* allocate the private part of the URB */
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urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
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mem_flags);
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if (!urb_priv)
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return -ENOMEM;
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INIT_LIST_HEAD (&urb_priv->pending);
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urb_priv->length = size;
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urb_priv->ed = ed;
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/* allocate the TDs (deferring hash chain updates) */
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for (i = 0; i < size; i++) {
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urb_priv->td [i] = td_alloc (ohci, mem_flags);
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if (!urb_priv->td [i]) {
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urb_priv->length = i;
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urb_free_priv (ohci, urb_priv);
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return -ENOMEM;
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}
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}
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spin_lock_irqsave (&ohci->lock, flags);
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/* don't submit to a dead HC */
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if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
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retval = -ENODEV;
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goto fail;
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}
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if (!HC_IS_RUNNING(hcd->state)) {
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retval = -ENODEV;
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goto fail;
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}
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/* in case of unlink-during-submit */
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spin_lock (&urb->lock);
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if (urb->status != -EINPROGRESS) {
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spin_unlock (&urb->lock);
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urb->hcpriv = urb_priv;
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finish_urb (ohci, urb);
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retval = 0;
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goto fail;
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}
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/* schedule the ed if needed */
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if (ed->state == ED_IDLE) {
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retval = ed_schedule (ohci, ed);
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if (retval < 0)
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goto fail0;
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if (ed->type == PIPE_ISOCHRONOUS) {
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u16 frame = ohci_frame_no(ohci);
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/* delay a few frames before the first TD */
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frame += max_t (u16, 8, ed->interval);
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frame &= ~(ed->interval - 1);
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frame |= ed->branch;
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urb->start_frame = frame;
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/* yes, only URB_ISO_ASAP is supported, and
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* urb->start_frame is never used as input.
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*/
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}
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} else if (ed->type == PIPE_ISOCHRONOUS)
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urb->start_frame = ed->last_iso + ed->interval;
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/* fill the TDs and link them to the ed; and
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* enable that part of the schedule, if needed
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* and update count of queued periodic urbs
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*/
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urb->hcpriv = urb_priv;
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td_submit_urb (ohci, urb);
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fail0:
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spin_unlock (&urb->lock);
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fail:
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if (retval)
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urb_free_priv (ohci, urb_priv);
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spin_unlock_irqrestore (&ohci->lock, flags);
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return retval;
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}
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/*
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* decouple the URB from the HC queues (TDs, urb_priv); it's
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* already marked using urb->status. reporting is always done
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* asynchronously, and we might be dealing with an urb that's
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* partially transferred, or an ED with other urbs being unlinked.
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*/
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static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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unsigned long flags;
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#ifdef OHCI_VERBOSE_DEBUG
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urb_print (urb, "UNLINK", 1);
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#endif
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spin_lock_irqsave (&ohci->lock, flags);
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if (HC_IS_RUNNING(hcd->state)) {
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urb_priv_t *urb_priv;
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/* Unless an IRQ completed the unlink while it was being
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* handed to us, flag it for unlink and giveback, and force
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* some upcoming INTR_SF to call finish_unlinks()
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*/
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urb_priv = urb->hcpriv;
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if (urb_priv) {
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if (urb_priv->ed->state == ED_OPER)
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start_ed_unlink (ohci, urb_priv->ed);
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}
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} else {
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/*
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* with HC dead, we won't respect hc queue pointers
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* any more ... just clean up every urb's memory.
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*/
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if (urb->hcpriv)
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finish_urb (ohci, urb);
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}
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spin_unlock_irqrestore (&ohci->lock, flags);
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return 0;
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}
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/*-------------------------------------------------------------------------*/
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/* frees config/altsetting state for endpoints,
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* including ED memory, dummy TD, and bulk/intr data toggle
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*/
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static void
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ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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unsigned long flags;
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struct ed *ed = ep->hcpriv;
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unsigned limit = 1000;
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/* ASSERT: any requests/urbs are being unlinked */
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/* ASSERT: nobody can be submitting urbs for this any more */
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if (!ed)
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return;
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rescan:
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spin_lock_irqsave (&ohci->lock, flags);
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if (!HC_IS_RUNNING (hcd->state)) {
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sanitize:
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ed->state = ED_IDLE;
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finish_unlinks (ohci, 0);
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}
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switch (ed->state) {
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case ED_UNLINK: /* wait for hw to finish? */
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/* major IRQ delivery trouble loses INTR_SF too... */
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if (limit-- == 0) {
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ohci_warn (ohci, "IRQ INTR_SF lossage\n");
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goto sanitize;
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}
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spin_unlock_irqrestore (&ohci->lock, flags);
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schedule_timeout_uninterruptible(1);
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goto rescan;
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case ED_IDLE: /* fully unlinked */
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if (list_empty (&ed->td_list)) {
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td_free (ohci, ed->dummy);
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ed_free (ohci, ed);
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break;
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}
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/* else FALL THROUGH */
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default:
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/* caller was supposed to have unlinked any requests;
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* that's not our job. can't recover; must leak ed.
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*/
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ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
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ed, ep->desc.bEndpointAddress, ed->state,
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list_empty (&ed->td_list) ? "" : " (has tds)");
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td_free (ohci, ed->dummy);
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break;
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}
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ep->hcpriv = NULL;
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spin_unlock_irqrestore (&ohci->lock, flags);
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return;
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}
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static int ohci_get_frame (struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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return ohci_frame_no(ohci);
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}
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static void ohci_usb_reset (struct ohci_hcd *ohci)
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{
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ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
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ohci->hc_control &= OHCI_CTRL_RWC;
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ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
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}
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/* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
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* other cases where the next software may expect clean state from the
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* "firmware". this is bus-neutral, unlike shutdown() methods.
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*/
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static void
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ohci_shutdown (struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci;
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ohci = hcd_to_ohci (hcd);
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ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
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ohci_usb_reset (ohci);
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/* flush the writes */
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(void) ohci_readl (ohci, &ohci->regs->control);
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}
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/*-------------------------------------------------------------------------*
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* HC functions
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*-------------------------------------------------------------------------*/
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/* init memory, and kick BIOS/SMM off */
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static int ohci_init (struct ohci_hcd *ohci)
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{
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int ret;
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struct usb_hcd *hcd = ohci_to_hcd(ohci);
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disable (ohci);
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ohci->regs = hcd->regs;
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/* REVISIT this BIOS handshake is now moved into PCI "quirks", and
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* was never needed for most non-PCI systems ... remove the code?
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*/
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#ifndef IR_DISABLE
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/* SMM owns the HC? not for long! */
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if (!no_handshake && ohci_readl (ohci,
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&ohci->regs->control) & OHCI_CTRL_IR) {
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u32 temp;
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ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
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/* this timeout is arbitrary. we make it long, so systems
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* depending on usb keyboards may be usable even if the
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* BIOS/SMM code seems pretty broken.
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*/
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temp = 500; /* arbitrary: five seconds */
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ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
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ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
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while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
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msleep (10);
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if (--temp == 0) {
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ohci_err (ohci, "USB HC takeover failed!"
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" (BIOS/SMM bug)\n");
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return -EBUSY;
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}
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}
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ohci_usb_reset (ohci);
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}
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#endif
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/* Disable HC interrupts */
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ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
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/* flush the writes, and save key bits like RWC */
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if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
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ohci->hc_control |= OHCI_CTRL_RWC;
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/* Read the number of ports unless overridden */
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if (ohci->num_ports == 0)
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ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
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if (ohci->hcca)
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return 0;
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ohci->hcca = dma_alloc_coherent (hcd->self.controller,
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sizeof *ohci->hcca, &ohci->hcca_dma, 0);
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if (!ohci->hcca)
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return -ENOMEM;
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if ((ret = ohci_mem_init (ohci)) < 0)
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ohci_stop (hcd);
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else {
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create_debug_files (ohci);
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}
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return ret;
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}
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/*-------------------------------------------------------------------------*/
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/* Start an OHCI controller, set the BUS operational
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* resets USB and controller
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* enable interrupts
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*/
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static int ohci_run (struct ohci_hcd *ohci)
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{
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u32 mask, temp;
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int first = ohci->fminterval == 0;
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struct usb_hcd *hcd = ohci_to_hcd(ohci);
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disable (ohci);
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/* boot firmware should have set this up (5.1.1.3.1) */
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if (first) {
|
|
|
|
temp = ohci_readl (ohci, &ohci->regs->fminterval);
|
|
ohci->fminterval = temp & 0x3fff;
|
|
if (ohci->fminterval != FI)
|
|
ohci_dbg (ohci, "fminterval delta %d\n",
|
|
ohci->fminterval - FI);
|
|
ohci->fminterval |= FSMP (ohci->fminterval) << 16;
|
|
/* also: power/overcurrent flags in roothub.a */
|
|
}
|
|
|
|
/* Reset USB nearly "by the book". RemoteWakeupConnected was
|
|
* saved if boot firmware (BIOS/SMM/...) told us it's connected,
|
|
* or if bus glue did the same (e.g. for PCI add-in cards with
|
|
* PCI PM support).
|
|
*/
|
|
if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
|
|
&& !device_may_wakeup(hcd->self.controller))
|
|
device_init_wakeup(hcd->self.controller, 1);
|
|
|
|
switch (ohci->hc_control & OHCI_CTRL_HCFS) {
|
|
case OHCI_USB_OPER:
|
|
temp = 0;
|
|
break;
|
|
case OHCI_USB_SUSPEND:
|
|
case OHCI_USB_RESUME:
|
|
ohci->hc_control &= OHCI_CTRL_RWC;
|
|
ohci->hc_control |= OHCI_USB_RESUME;
|
|
temp = 10 /* msec wait */;
|
|
break;
|
|
// case OHCI_USB_RESET:
|
|
default:
|
|
ohci->hc_control &= OHCI_CTRL_RWC;
|
|
ohci->hc_control |= OHCI_USB_RESET;
|
|
temp = 50 /* msec wait */;
|
|
break;
|
|
}
|
|
ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
|
|
// flush the writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
msleep(temp);
|
|
|
|
memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
|
|
|
|
/* 2msec timelimit here means no irqs/preempt */
|
|
spin_lock_irq (&ohci->lock);
|
|
|
|
retry:
|
|
/* HC Reset requires max 10 us delay */
|
|
ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
|
|
temp = 30; /* ... allow extra time */
|
|
while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
|
|
if (--temp == 0) {
|
|
spin_unlock_irq (&ohci->lock);
|
|
ohci_err (ohci, "USB HC reset timed out!\n");
|
|
return -1;
|
|
}
|
|
udelay (1);
|
|
}
|
|
|
|
/* now we're in the SUSPEND state ... must go OPERATIONAL
|
|
* within 2msec else HC enters RESUME
|
|
*
|
|
* ... but some hardware won't init fmInterval "by the book"
|
|
* (SiS, OPTi ...), so reset again instead. SiS doesn't need
|
|
* this if we write fmInterval after we're OPERATIONAL.
|
|
* Unclear about ALi, ServerWorks, and others ... this could
|
|
* easily be a longstanding bug in chip init on Linux.
|
|
*/
|
|
if (ohci->flags & OHCI_QUIRK_INITRESET) {
|
|
ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
|
|
// flush those writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
}
|
|
|
|
/* Tell the controller where the control and bulk lists are
|
|
* The lists are empty now. */
|
|
ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
|
|
ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
|
|
|
|
/* a reset clears this */
|
|
ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
|
|
|
|
periodic_reinit (ohci);
|
|
|
|
/* some OHCI implementations are finicky about how they init.
|
|
* bogus values here mean not even enumeration could work.
|
|
*/
|
|
if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
|
|
|| !ohci_readl (ohci, &ohci->regs->periodicstart)) {
|
|
if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
|
|
ohci->flags |= OHCI_QUIRK_INITRESET;
|
|
ohci_dbg (ohci, "enabling initreset quirk\n");
|
|
goto retry;
|
|
}
|
|
spin_unlock_irq (&ohci->lock);
|
|
ohci_err (ohci, "init err (%08x %04x)\n",
|
|
ohci_readl (ohci, &ohci->regs->fminterval),
|
|
ohci_readl (ohci, &ohci->regs->periodicstart));
|
|
return -EOVERFLOW;
|
|
}
|
|
|
|
/* use rhsc irqs after khubd is fully initialized */
|
|
hcd->poll_rh = 1;
|
|
hcd->uses_new_polling = 1;
|
|
|
|
/* start controller operations */
|
|
ohci->hc_control &= OHCI_CTRL_RWC;
|
|
ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
|
|
ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
|
|
hcd->state = HC_STATE_RUNNING;
|
|
|
|
/* wake on ConnectStatusChange, matching external hubs */
|
|
ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
|
|
|
|
/* Choose the interrupts we care about now, others later on demand */
|
|
mask = OHCI_INTR_INIT;
|
|
ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
|
|
ohci_writel (ohci, mask, &ohci->regs->intrenable);
|
|
|
|
/* handle root hub init quirks ... */
|
|
temp = roothub_a (ohci);
|
|
temp &= ~(RH_A_PSM | RH_A_OCPM);
|
|
if (ohci->flags & OHCI_QUIRK_SUPERIO) {
|
|
/* NSC 87560 and maybe others */
|
|
temp |= RH_A_NOCP;
|
|
temp &= ~(RH_A_POTPGT | RH_A_NPS);
|
|
ohci_writel (ohci, temp, &ohci->regs->roothub.a);
|
|
} else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
|
|
/* hub power always on; required for AMD-756 and some
|
|
* Mac platforms. ganged overcurrent reporting, if any.
|
|
*/
|
|
temp |= RH_A_NPS;
|
|
ohci_writel (ohci, temp, &ohci->regs->roothub.a);
|
|
}
|
|
ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
|
|
ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
|
|
&ohci->regs->roothub.b);
|
|
// flush those writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
|
|
ohci->next_statechange = jiffies + STATECHANGE_DELAY;
|
|
spin_unlock_irq (&ohci->lock);
|
|
|
|
// POTPGT delay is bits 24-31, in 2 ms units.
|
|
mdelay ((temp >> 23) & 0x1fe);
|
|
hcd->state = HC_STATE_RUNNING;
|
|
|
|
ohci_dump (ohci, 1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* an interrupt happens */
|
|
|
|
static irqreturn_t ohci_irq (struct usb_hcd *hcd)
|
|
{
|
|
struct ohci_hcd *ohci = hcd_to_ohci (hcd);
|
|
struct ohci_regs __iomem *regs = ohci->regs;
|
|
int ints;
|
|
|
|
/* we can eliminate a (slow) ohci_readl()
|
|
if _only_ WDH caused this irq */
|
|
if ((ohci->hcca->done_head != 0)
|
|
&& ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
|
|
& 0x01)) {
|
|
ints = OHCI_INTR_WDH;
|
|
|
|
/* cardbus/... hardware gone before remove() */
|
|
} else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) {
|
|
disable (ohci);
|
|
ohci_dbg (ohci, "device removed!\n");
|
|
return IRQ_HANDLED;
|
|
|
|
/* interrupt for some other device? */
|
|
} else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) {
|
|
return IRQ_NOTMINE;
|
|
}
|
|
|
|
if (ints & OHCI_INTR_UE) {
|
|
// e.g. due to PCI Master/Target Abort
|
|
if (ohci->flags & OHCI_QUIRK_NEC) {
|
|
/* Workaround for a silicon bug in some NEC chips used
|
|
* in Apple's PowerBooks. Adapted from Darwin code.
|
|
*/
|
|
ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
|
|
|
|
ohci_writel (ohci, OHCI_INTR_UE, ®s->intrdisable);
|
|
|
|
schedule_work (&ohci->nec_work);
|
|
} else {
|
|
disable (ohci);
|
|
ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
|
|
}
|
|
|
|
ohci_dump (ohci, 1);
|
|
ohci_usb_reset (ohci);
|
|
}
|
|
|
|
if (ints & OHCI_INTR_RHSC) {
|
|
ohci_vdbg(ohci, "rhsc\n");
|
|
ohci->next_statechange = jiffies + STATECHANGE_DELAY;
|
|
ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
|
|
®s->intrstatus);
|
|
|
|
/* NOTE: Vendors didn't always make the same implementation
|
|
* choices for RHSC. Many followed the spec; RHSC triggers
|
|
* on an edge, like setting and maybe clearing a port status
|
|
* change bit. With others it's level-triggered, active
|
|
* until khubd clears all the port status change bits. We'll
|
|
* always disable it here and rely on polling until khubd
|
|
* re-enables it.
|
|
*/
|
|
ohci_writel(ohci, OHCI_INTR_RHSC, ®s->intrdisable);
|
|
usb_hcd_poll_rh_status(hcd);
|
|
}
|
|
|
|
/* For connect and disconnect events, we expect the controller
|
|
* to turn on RHSC along with RD. But for remote wakeup events
|
|
* this might not happen.
|
|
*/
|
|
else if (ints & OHCI_INTR_RD) {
|
|
ohci_vdbg(ohci, "resume detect\n");
|
|
ohci_writel(ohci, OHCI_INTR_RD, ®s->intrstatus);
|
|
hcd->poll_rh = 1;
|
|
if (ohci->autostop) {
|
|
spin_lock (&ohci->lock);
|
|
ohci_rh_resume (ohci);
|
|
spin_unlock (&ohci->lock);
|
|
} else
|
|
usb_hcd_resume_root_hub(hcd);
|
|
}
|
|
|
|
if (ints & OHCI_INTR_WDH) {
|
|
if (HC_IS_RUNNING(hcd->state))
|
|
ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable);
|
|
spin_lock (&ohci->lock);
|
|
dl_done_list (ohci);
|
|
spin_unlock (&ohci->lock);
|
|
if (HC_IS_RUNNING(hcd->state))
|
|
ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable);
|
|
}
|
|
|
|
/* could track INTR_SO to reduce available PCI/... bandwidth */
|
|
|
|
/* handle any pending URB/ED unlinks, leaving INTR_SF enabled
|
|
* when there's still unlinking to be done (next frame).
|
|
*/
|
|
spin_lock (&ohci->lock);
|
|
if (ohci->ed_rm_list)
|
|
finish_unlinks (ohci, ohci_frame_no(ohci));
|
|
if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
|
|
&& HC_IS_RUNNING(hcd->state))
|
|
ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable);
|
|
spin_unlock (&ohci->lock);
|
|
|
|
if (HC_IS_RUNNING(hcd->state)) {
|
|
ohci_writel (ohci, ints, ®s->intrstatus);
|
|
ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable);
|
|
// flush those writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static void ohci_stop (struct usb_hcd *hcd)
|
|
{
|
|
struct ohci_hcd *ohci = hcd_to_ohci (hcd);
|
|
|
|
ohci_dump (ohci, 1);
|
|
|
|
flush_scheduled_work();
|
|
|
|
ohci_usb_reset (ohci);
|
|
ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
|
|
free_irq(hcd->irq, hcd);
|
|
hcd->irq = -1;
|
|
|
|
remove_debug_files (ohci);
|
|
ohci_mem_cleanup (ohci);
|
|
if (ohci->hcca) {
|
|
dma_free_coherent (hcd->self.controller,
|
|
sizeof *ohci->hcca,
|
|
ohci->hcca, ohci->hcca_dma);
|
|
ohci->hcca = NULL;
|
|
ohci->hcca_dma = 0;
|
|
}
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* must not be called from interrupt context */
|
|
static int ohci_restart (struct ohci_hcd *ohci)
|
|
{
|
|
int temp;
|
|
int i;
|
|
struct urb_priv *priv;
|
|
|
|
spin_lock_irq(&ohci->lock);
|
|
disable (ohci);
|
|
|
|
/* Recycle any "live" eds/tds (and urbs). */
|
|
if (!list_empty (&ohci->pending))
|
|
ohci_dbg(ohci, "abort schedule...\n");
|
|
list_for_each_entry (priv, &ohci->pending, pending) {
|
|
struct urb *urb = priv->td[0]->urb;
|
|
struct ed *ed = priv->ed;
|
|
|
|
switch (ed->state) {
|
|
case ED_OPER:
|
|
ed->state = ED_UNLINK;
|
|
ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
|
|
ed_deschedule (ohci, ed);
|
|
|
|
ed->ed_next = ohci->ed_rm_list;
|
|
ed->ed_prev = NULL;
|
|
ohci->ed_rm_list = ed;
|
|
/* FALLTHROUGH */
|
|
case ED_UNLINK:
|
|
break;
|
|
default:
|
|
ohci_dbg(ohci, "bogus ed %p state %d\n",
|
|
ed, ed->state);
|
|
}
|
|
|
|
spin_lock (&urb->lock);
|
|
urb->status = -ESHUTDOWN;
|
|
spin_unlock (&urb->lock);
|
|
}
|
|
finish_unlinks (ohci, 0);
|
|
spin_unlock_irq(&ohci->lock);
|
|
|
|
/* paranoia, in case that didn't work: */
|
|
|
|
/* empty the interrupt branches */
|
|
for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
|
|
for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
|
|
|
|
/* no EDs to remove */
|
|
ohci->ed_rm_list = NULL;
|
|
|
|
/* empty control and bulk lists */
|
|
ohci->ed_controltail = NULL;
|
|
ohci->ed_bulktail = NULL;
|
|
|
|
if ((temp = ohci_run (ohci)) < 0) {
|
|
ohci_err (ohci, "can't restart, %d\n", temp);
|
|
return temp;
|
|
}
|
|
ohci_dbg(ohci, "restart complete\n");
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* NEC workaround */
|
|
static void ohci_quirk_nec_worker(struct work_struct *work)
|
|
{
|
|
struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
|
|
int status;
|
|
|
|
status = ohci_init(ohci);
|
|
if (status != 0) {
|
|
ohci_err(ohci, "Restarting NEC controller failed "
|
|
"in ohci_init, %d\n", status);
|
|
return;
|
|
}
|
|
|
|
status = ohci_restart(ohci);
|
|
if (status != 0)
|
|
ohci_err(ohci, "Restarting NEC controller failed "
|
|
"in ohci_restart, %d\n", status);
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
|
|
|
|
MODULE_AUTHOR (DRIVER_AUTHOR);
|
|
MODULE_DESCRIPTION (DRIVER_INFO);
|
|
MODULE_LICENSE ("GPL");
|
|
|
|
#ifdef CONFIG_PCI
|
|
#include "ohci-pci.c"
|
|
#define PCI_DRIVER ohci_pci_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_SA1111
|
|
#include "ohci-sa1111.c"
|
|
#define SA1111_DRIVER ohci_hcd_sa1111_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_S3C2410
|
|
#include "ohci-s3c2410.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_s3c2410_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_OMAP
|
|
#include "ohci-omap.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_omap_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_LH7A404
|
|
#include "ohci-lh7a404.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_lh7a404_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_PXA27x
|
|
#include "ohci-pxa27x.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_pxa27x_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_EP93XX
|
|
#include "ohci-ep93xx.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_ep93xx_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_SOC_AU1X00
|
|
#include "ohci-au1xxx.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_au1xxx_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_PNX8550
|
|
#include "ohci-pnx8550.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_pnx8550_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
|
|
#include "ohci-ppc-soc.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_ppc_soc_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_AT91
|
|
#include "ohci-at91.c"
|
|
#define PLATFORM_DRIVER ohci_hcd_at91_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_PNX4008
|
|
#include "ohci-pnx4008.c"
|
|
#define PLATFORM_DRIVER usb_hcd_pnx4008_driver
|
|
#endif
|
|
|
|
|
|
#ifdef CONFIG_USB_OHCI_HCD_PPC_OF
|
|
#include "ohci-ppc-of.c"
|
|
#define OF_PLATFORM_DRIVER ohci_hcd_ppc_of_driver
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_PS3
|
|
#include "ohci-ps3.c"
|
|
#define PS3_SYSTEM_BUS_DRIVER ps3_ohci_driver
|
|
#endif
|
|
|
|
#if !defined(PCI_DRIVER) && \
|
|
!defined(PLATFORM_DRIVER) && \
|
|
!defined(OF_PLATFORM_DRIVER) && \
|
|
!defined(SA1111_DRIVER) && \
|
|
!defined(PS3_SYSTEM_BUS_DRIVER)
|
|
#error "missing bus glue for ohci-hcd"
|
|
#endif
|
|
|
|
static int __init ohci_hcd_mod_init(void)
|
|
{
|
|
int retval = 0;
|
|
|
|
if (usb_disabled())
|
|
return -ENODEV;
|
|
|
|
printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
|
|
pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
|
|
sizeof (struct ed), sizeof (struct td));
|
|
|
|
#ifdef PS3_SYSTEM_BUS_DRIVER
|
|
retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
|
|
if (retval < 0)
|
|
goto error_ps3;
|
|
#endif
|
|
|
|
#ifdef PLATFORM_DRIVER
|
|
retval = platform_driver_register(&PLATFORM_DRIVER);
|
|
if (retval < 0)
|
|
goto error_platform;
|
|
#endif
|
|
|
|
#ifdef OF_PLATFORM_DRIVER
|
|
retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
|
|
if (retval < 0)
|
|
goto error_of_platform;
|
|
#endif
|
|
|
|
#ifdef SA1111_DRIVER
|
|
retval = sa1111_driver_register(&SA1111_DRIVER);
|
|
if (retval < 0)
|
|
goto error_sa1111;
|
|
#endif
|
|
|
|
#ifdef PCI_DRIVER
|
|
retval = pci_register_driver(&PCI_DRIVER);
|
|
if (retval < 0)
|
|
goto error_pci;
|
|
#endif
|
|
|
|
return retval;
|
|
|
|
/* Error path */
|
|
#ifdef PCI_DRIVER
|
|
error_pci:
|
|
#endif
|
|
#ifdef SA1111_DRIVER
|
|
sa1111_driver_unregister(&SA1111_DRIVER);
|
|
error_sa1111:
|
|
#endif
|
|
#ifdef OF_PLATFORM_DRIVER
|
|
of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
|
|
error_of_platform:
|
|
#endif
|
|
#ifdef PLATFORM_DRIVER
|
|
platform_driver_unregister(&PLATFORM_DRIVER);
|
|
error_platform:
|
|
#endif
|
|
#ifdef PS3_SYSTEM_BUS_DRIVER
|
|
ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
|
|
error_ps3:
|
|
#endif
|
|
return retval;
|
|
}
|
|
module_init(ohci_hcd_mod_init);
|
|
|
|
static void __exit ohci_hcd_mod_exit(void)
|
|
{
|
|
#ifdef PCI_DRIVER
|
|
pci_unregister_driver(&PCI_DRIVER);
|
|
#endif
|
|
#ifdef SA1111_DRIVER
|
|
sa1111_driver_unregister(&SA1111_DRIVER);
|
|
#endif
|
|
#ifdef OF_PLATFORM_DRIVER
|
|
of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
|
|
#endif
|
|
#ifdef PLATFORM_DRIVER
|
|
platform_driver_unregister(&PLATFORM_DRIVER);
|
|
#endif
|
|
#ifdef PS3_SYSTEM_BUS_DRIVER
|
|
ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
|
|
#endif
|
|
}
|
|
module_exit(ohci_hcd_mod_exit);
|
|
|