![Henry Su](/assets/img/avatar_default.png)
Add the SMBus device ID for ATI SB700. Signed-off-by: Henry Su <Henry.su@amd.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
478 lines
13 KiB
C
478 lines
13 KiB
C
/*
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piix4.c - Part of lm_sensors, Linux kernel modules for hardware
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monitoring
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Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
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Philip Edelbrock <phil@netroedge.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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Supports:
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Intel PIIX4, 440MX
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Serverworks OSB4, CSB5, CSB6, HT-1000
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ATI IXP200, IXP300, IXP400, SB600, SB700
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SMSC Victory66
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Note: we assume there can only be one device, with one SMBus interface.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/apm_bios.h>
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#include <linux/dmi.h>
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#include <asm/io.h>
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struct sd {
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const unsigned short mfr;
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const unsigned short dev;
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const unsigned char fn;
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const char *name;
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};
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/* PIIX4 SMBus address offsets */
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#define SMBHSTSTS (0 + piix4_smba)
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#define SMBHSLVSTS (1 + piix4_smba)
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#define SMBHSTCNT (2 + piix4_smba)
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#define SMBHSTCMD (3 + piix4_smba)
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#define SMBHSTADD (4 + piix4_smba)
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#define SMBHSTDAT0 (5 + piix4_smba)
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#define SMBHSTDAT1 (6 + piix4_smba)
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#define SMBBLKDAT (7 + piix4_smba)
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#define SMBSLVCNT (8 + piix4_smba)
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#define SMBSHDWCMD (9 + piix4_smba)
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#define SMBSLVEVT (0xA + piix4_smba)
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#define SMBSLVDAT (0xC + piix4_smba)
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/* count for request_region */
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#define SMBIOSIZE 8
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/* PCI Address Constants */
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#define SMBBA 0x090
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#define SMBHSTCFG 0x0D2
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#define SMBSLVC 0x0D3
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#define SMBSHDW1 0x0D4
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#define SMBSHDW2 0x0D5
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#define SMBREV 0x0D6
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/* Other settings */
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#define MAX_TIMEOUT 500
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#define ENABLE_INT9 0
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/* PIIX4 constants */
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#define PIIX4_QUICK 0x00
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#define PIIX4_BYTE 0x04
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#define PIIX4_BYTE_DATA 0x08
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#define PIIX4_WORD_DATA 0x0C
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#define PIIX4_BLOCK_DATA 0x14
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/* insmod parameters */
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/* If force is set to anything different from 0, we forcibly enable the
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PIIX4. DANGEROUS! */
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static int force;
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module_param (force, int, 0);
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MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
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/* If force_addr is set to anything different from 0, we forcibly enable
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the PIIX4 at the given address. VERY DANGEROUS! */
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static int force_addr;
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module_param (force_addr, int, 0);
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MODULE_PARM_DESC(force_addr,
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"Forcibly enable the PIIX4 at the given address. "
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"EXTREMELY DANGEROUS!");
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static int piix4_transaction(void);
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static unsigned short piix4_smba;
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static struct pci_driver piix4_driver;
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static struct i2c_adapter piix4_adapter;
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static struct dmi_system_id __devinitdata piix4_dmi_table[] = {
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{
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.ident = "IBM",
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.matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
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},
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{ },
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};
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static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
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const struct pci_device_id *id)
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{
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unsigned char temp;
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/* match up the function */
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if (PCI_FUNC(PIIX4_dev->devfn) != id->driver_data)
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return -ENODEV;
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dev_info(&PIIX4_dev->dev, "Found %s device\n", pci_name(PIIX4_dev));
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/* Don't access SMBus on IBM systems which get corrupted eeproms */
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if (dmi_check_system(piix4_dmi_table) &&
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PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
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dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
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"may corrupt your serial eeprom! Refusing to load "
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"module!\n");
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return -EPERM;
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}
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/* Determine the address of the SMBus areas */
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if (force_addr) {
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piix4_smba = force_addr & 0xfff0;
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force = 0;
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} else {
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pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
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piix4_smba &= 0xfff0;
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if(piix4_smba == 0) {
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dev_err(&PIIX4_dev->dev, "SMB base address "
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"uninitialized - upgrade BIOS or use "
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"force_addr=0xaddr\n");
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return -ENODEV;
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}
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}
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if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
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dev_err(&PIIX4_dev->dev, "SMB region 0x%x already in use!\n",
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piix4_smba);
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return -ENODEV;
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}
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pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
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/* If force_addr is set, we program the new address here. Just to make
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sure, we disable the PIIX4 first. */
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if (force_addr) {
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pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
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pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
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pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
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dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
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"new address %04x!\n", piix4_smba);
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} else if ((temp & 1) == 0) {
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if (force) {
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/* This should never need to be done, but has been
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* noted that many Dell machines have the SMBus
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* interface on the PIIX4 disabled!? NOTE: This assumes
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* I/O space and other allocations WERE done by the
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* Bios! Don't complain if your hardware does weird
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* things after enabling this. :') Check for Bios
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* updates before resorting to this.
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*/
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pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
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temp | 1);
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dev_printk(KERN_NOTICE, &PIIX4_dev->dev,
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"WARNING: SMBus interface has been "
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"FORCEFULLY ENABLED!\n");
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} else {
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dev_err(&PIIX4_dev->dev,
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"Host SMBus controller not enabled!\n");
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release_region(piix4_smba, SMBIOSIZE);
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piix4_smba = 0;
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return -ENODEV;
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}
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}
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if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
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dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
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else if ((temp & 0x0E) == 0)
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dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
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else
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dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
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"(or code out of date)!\n");
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pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
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dev_dbg(&PIIX4_dev->dev, "SMBREV = 0x%X\n", temp);
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dev_dbg(&PIIX4_dev->dev, "SMBA = 0x%X\n", piix4_smba);
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return 0;
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}
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/* Another internally used function */
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static int piix4_transaction(void)
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{
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int temp;
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int result = 0;
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int timeout = 0;
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dev_dbg(&piix4_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
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"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
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inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
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inb_p(SMBHSTDAT1));
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/* Make sure the SMBus host is ready to start transmitting */
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if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
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dev_dbg(&piix4_adapter.dev, "SMBus busy (%02x). "
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"Resetting...\n", temp);
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outb_p(temp, SMBHSTSTS);
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if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
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dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp);
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return -1;
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} else {
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dev_dbg(&piix4_adapter.dev, "Successfull!\n");
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}
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}
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/* start the transaction by setting bit 6 */
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outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
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/* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
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do {
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msleep(1);
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temp = inb_p(SMBHSTSTS);
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} while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout >= MAX_TIMEOUT) {
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dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
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result = -1;
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}
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if (temp & 0x10) {
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result = -1;
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dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n");
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}
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if (temp & 0x08) {
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result = -1;
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dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be "
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"locked until next hard reset. (sorry!)\n");
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/* Clock stops and slave is stuck in mid-transmission */
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}
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if (temp & 0x04) {
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result = -1;
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dev_dbg(&piix4_adapter.dev, "Error: no response!\n");
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}
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if (inb_p(SMBHSTSTS) != 0x00)
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outb_p(inb(SMBHSTSTS), SMBHSTSTS);
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if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
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dev_err(&piix4_adapter.dev, "Failed reset at end of "
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"transaction (%02x)\n", temp);
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}
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dev_dbg(&piix4_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
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"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
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inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
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inb_p(SMBHSTDAT1));
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return result;
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}
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/* Return -1 on error. */
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static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size, union i2c_smbus_data * data)
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{
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int i, len;
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switch (size) {
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case I2C_SMBUS_PROC_CALL:
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dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
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return -1;
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case I2C_SMBUS_QUICK:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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size = PIIX4_QUICK;
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break;
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case I2C_SMBUS_BYTE:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(command, SMBHSTCMD);
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size = PIIX4_BYTE;
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break;
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case I2C_SMBUS_BYTE_DATA:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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outb_p(command, SMBHSTCMD);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(data->byte, SMBHSTDAT0);
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size = PIIX4_BYTE_DATA;
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break;
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case I2C_SMBUS_WORD_DATA:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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outb_p(command, SMBHSTCMD);
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if (read_write == I2C_SMBUS_WRITE) {
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outb_p(data->word & 0xff, SMBHSTDAT0);
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outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
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}
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size = PIIX4_WORD_DATA;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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outb_p(command, SMBHSTCMD);
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if (read_write == I2C_SMBUS_WRITE) {
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len = data->block[0];
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if (len < 0)
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len = 0;
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if (len > 32)
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len = 32;
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outb_p(len, SMBHSTDAT0);
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i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
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for (i = 1; i <= len; i++)
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outb_p(data->block[i], SMBBLKDAT);
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}
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size = PIIX4_BLOCK_DATA;
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break;
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}
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outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
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if (piix4_transaction()) /* Error in transaction */
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return -1;
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if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
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return 0;
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switch (size) {
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case PIIX4_BYTE: /* Where is the result put? I assume here it is in
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SMBHSTDAT0 but it might just as well be in the
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SMBHSTCMD. No clue in the docs */
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data->byte = inb_p(SMBHSTDAT0);
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break;
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case PIIX4_BYTE_DATA:
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data->byte = inb_p(SMBHSTDAT0);
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break;
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case PIIX4_WORD_DATA:
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data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
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break;
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case PIIX4_BLOCK_DATA:
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data->block[0] = inb_p(SMBHSTDAT0);
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i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
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for (i = 1; i <= data->block[0]; i++)
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data->block[i] = inb_p(SMBBLKDAT);
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break;
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}
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return 0;
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}
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static u32 piix4_func(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_BLOCK_DATA;
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}
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static const struct i2c_algorithm smbus_algorithm = {
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.smbus_xfer = piix4_access,
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.functionality = piix4_func,
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};
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static struct i2c_adapter piix4_adapter = {
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.owner = THIS_MODULE,
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.id = I2C_HW_SMBUS_PIIX4,
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.class = I2C_CLASS_HWMON,
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.algo = &smbus_algorithm,
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};
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static struct pci_device_id piix4_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3),
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.driver_data = 3 },
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{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SMBUS),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SMBUS),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000SB),
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.driver_data = 0 },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3),
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.driver_data = 3 },
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{ PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3),
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.driver_data = 0 },
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{ 0, }
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};
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MODULE_DEVICE_TABLE (pci, piix4_ids);
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static int __devinit piix4_probe(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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int retval;
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retval = piix4_setup(dev, id);
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if (retval)
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return retval;
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/* set up the sysfs linkage to our parent device */
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piix4_adapter.dev.parent = &dev->dev;
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snprintf(piix4_adapter.name, sizeof(piix4_adapter.name),
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"SMBus PIIX4 adapter at %04x", piix4_smba);
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if ((retval = i2c_add_adapter(&piix4_adapter))) {
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dev_err(&dev->dev, "Couldn't register adapter!\n");
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release_region(piix4_smba, SMBIOSIZE);
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piix4_smba = 0;
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}
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return retval;
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}
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static void __devexit piix4_remove(struct pci_dev *dev)
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{
|
|
if (piix4_smba) {
|
|
i2c_del_adapter(&piix4_adapter);
|
|
release_region(piix4_smba, SMBIOSIZE);
|
|
piix4_smba = 0;
|
|
}
|
|
}
|
|
|
|
static struct pci_driver piix4_driver = {
|
|
.name = "piix4_smbus",
|
|
.id_table = piix4_ids,
|
|
.probe = piix4_probe,
|
|
.remove = __devexit_p(piix4_remove),
|
|
};
|
|
|
|
static int __init i2c_piix4_init(void)
|
|
{
|
|
return pci_register_driver(&piix4_driver);
|
|
}
|
|
|
|
static void __exit i2c_piix4_exit(void)
|
|
{
|
|
pci_unregister_driver(&piix4_driver);
|
|
}
|
|
|
|
MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
|
|
"Philip Edelbrock <phil@netroedge.com>");
|
|
MODULE_DESCRIPTION("PIIX4 SMBus driver");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
module_init(i2c_piix4_init);
|
|
module_exit(i2c_piix4_exit);
|