![Ben Dooks](/assets/img/avatar_default.png)
Fixup the include files after the arch moves that where included in 2.6.23. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
951 lines
20 KiB
C
951 lines
20 KiB
C
/* linux/drivers/i2c/busses/i2c-s3c2410.c
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*
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* Copyright (C) 2004,2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 I2C Controller
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/i2c-id.h>
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#include <linux/init.h>
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#include <linux/time.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/arch/regs-gpio.h>
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#include <asm/plat-s3c/regs-iic.h>
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#include <asm/plat-s3c/iic.h>
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/* i2c controller state */
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enum s3c24xx_i2c_state {
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STATE_IDLE,
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STATE_START,
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STATE_READ,
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STATE_WRITE,
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STATE_STOP
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};
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struct s3c24xx_i2c {
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spinlock_t lock;
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wait_queue_head_t wait;
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struct i2c_msg *msg;
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unsigned int msg_num;
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unsigned int msg_idx;
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unsigned int msg_ptr;
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unsigned int tx_setup;
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enum s3c24xx_i2c_state state;
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void __iomem *regs;
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struct clk *clk;
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struct device *dev;
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struct resource *irq;
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struct resource *ioarea;
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struct i2c_adapter adap;
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};
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/* default platform data to use if not supplied in the platform_device
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*/
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static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {
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.flags = 0,
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.slave_addr = 0x10,
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.bus_freq = 100*1000,
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.max_freq = 400*1000,
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.sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
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};
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/* s3c24xx_i2c_is2440()
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*
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* return true is this is an s3c2440
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*/
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static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
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{
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struct platform_device *pdev = to_platform_device(i2c->dev);
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return !strcmp(pdev->name, "s3c2440-i2c");
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}
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/* s3c24xx_i2c_get_platformdata
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*
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* get the platform data associated with the given device, or return
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* the default if there is none
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*/
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static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)
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{
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if (dev->platform_data != NULL)
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return (struct s3c2410_platform_i2c *)dev->platform_data;
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return &s3c24xx_i2c_default_platform;
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}
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/* s3c24xx_i2c_master_complete
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*
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* complete the message and wake up the caller, using the given return code,
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* or zero to mean ok.
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*/
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static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
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{
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dev_dbg(i2c->dev, "master_complete %d\n", ret);
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i2c->msg_ptr = 0;
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i2c->msg = NULL;
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i2c->msg_idx ++;
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i2c->msg_num = 0;
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if (ret)
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i2c->msg_idx = ret;
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wake_up(&i2c->wait);
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}
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static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
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{
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unsigned long tmp;
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tmp = readl(i2c->regs + S3C2410_IICCON);
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writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
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}
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static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
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{
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unsigned long tmp;
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tmp = readl(i2c->regs + S3C2410_IICCON);
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writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
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}
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/* irq enable/disable functions */
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static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
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{
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unsigned long tmp;
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tmp = readl(i2c->regs + S3C2410_IICCON);
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writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
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}
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static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
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{
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unsigned long tmp;
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tmp = readl(i2c->regs + S3C2410_IICCON);
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writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
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}
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/* s3c24xx_i2c_message_start
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*
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* put the start of a message onto the bus
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*/
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static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
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struct i2c_msg *msg)
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{
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unsigned int addr = (msg->addr & 0x7f) << 1;
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unsigned long stat;
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unsigned long iiccon;
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stat = 0;
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stat |= S3C2410_IICSTAT_TXRXEN;
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if (msg->flags & I2C_M_RD) {
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stat |= S3C2410_IICSTAT_MASTER_RX;
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addr |= 1;
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} else
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stat |= S3C2410_IICSTAT_MASTER_TX;
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if (msg->flags & I2C_M_REV_DIR_ADDR)
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addr ^= 1;
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// todo - check for wether ack wanted or not
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s3c24xx_i2c_enable_ack(i2c);
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iiccon = readl(i2c->regs + S3C2410_IICCON);
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writel(stat, i2c->regs + S3C2410_IICSTAT);
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dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
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writeb(addr, i2c->regs + S3C2410_IICDS);
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/* delay here to ensure the data byte has gotten onto the bus
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* before the transaction is started */
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ndelay(i2c->tx_setup);
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dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
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writel(iiccon, i2c->regs + S3C2410_IICCON);
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stat |= S3C2410_IICSTAT_START;
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writel(stat, i2c->regs + S3C2410_IICSTAT);
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}
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static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
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{
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unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
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dev_dbg(i2c->dev, "STOP\n");
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/* stop the transfer */
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iicstat &= ~ S3C2410_IICSTAT_START;
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writel(iicstat, i2c->regs + S3C2410_IICSTAT);
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i2c->state = STATE_STOP;
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s3c24xx_i2c_master_complete(i2c, ret);
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s3c24xx_i2c_disable_irq(i2c);
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}
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/* helper functions to determine the current state in the set of
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* messages we are sending */
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/* is_lastmsg()
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*
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* returns TRUE if the current message is the last in the set
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*/
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static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
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{
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return i2c->msg_idx >= (i2c->msg_num - 1);
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}
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/* is_msglast
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*
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* returns TRUE if we this is the last byte in the current message
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*/
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static inline int is_msglast(struct s3c24xx_i2c *i2c)
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{
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return i2c->msg_ptr == i2c->msg->len-1;
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}
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/* is_msgend
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*
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* returns TRUE if we reached the end of the current message
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*/
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static inline int is_msgend(struct s3c24xx_i2c *i2c)
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{
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return i2c->msg_ptr >= i2c->msg->len;
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}
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/* i2s_s3c_irq_nextbyte
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*
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* process an interrupt and work out what to do
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*/
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static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
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{
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unsigned long tmp;
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unsigned char byte;
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int ret = 0;
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switch (i2c->state) {
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case STATE_IDLE:
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dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__);
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goto out;
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break;
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case STATE_STOP:
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dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
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s3c24xx_i2c_disable_irq(i2c);
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goto out_ack;
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case STATE_START:
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/* last thing we did was send a start condition on the
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* bus, or started a new i2c message
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*/
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if (iicstat & S3C2410_IICSTAT_LASTBIT &&
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!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
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/* ack was not received... */
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dev_dbg(i2c->dev, "ack was not received\n");
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s3c24xx_i2c_stop(i2c, -EREMOTEIO);
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goto out_ack;
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}
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if (i2c->msg->flags & I2C_M_RD)
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i2c->state = STATE_READ;
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else
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i2c->state = STATE_WRITE;
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/* terminate the transfer if there is nothing to do
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* (used by the i2c probe to find devices */
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if (is_lastmsg(i2c) && i2c->msg->len == 0) {
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s3c24xx_i2c_stop(i2c, 0);
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goto out_ack;
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}
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if (i2c->state == STATE_READ)
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goto prepare_read;
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/* fall through to the write state, as we will need to
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* send a byte as well */
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case STATE_WRITE:
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/* we are writing data to the device... check for the
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* end of the message, and if so, work out what to do
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*/
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retry_write:
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if (!is_msgend(i2c)) {
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byte = i2c->msg->buf[i2c->msg_ptr++];
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writeb(byte, i2c->regs + S3C2410_IICDS);
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/* delay after writing the byte to allow the
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* data setup time on the bus, as writing the
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* data to the register causes the first bit
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* to appear on SDA, and SCL will change as
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* soon as the interrupt is acknowledged */
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ndelay(i2c->tx_setup);
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} else if (!is_lastmsg(i2c)) {
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/* we need to go to the next i2c message */
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dev_dbg(i2c->dev, "WRITE: Next Message\n");
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i2c->msg_ptr = 0;
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i2c->msg_idx ++;
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i2c->msg++;
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/* check to see if we need to do another message */
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if (i2c->msg->flags & I2C_M_NOSTART) {
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if (i2c->msg->flags & I2C_M_RD) {
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/* cannot do this, the controller
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* forces us to send a new START
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* when we change direction */
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s3c24xx_i2c_stop(i2c, -EINVAL);
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}
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goto retry_write;
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} else {
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/* send the new start */
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s3c24xx_i2c_message_start(i2c, i2c->msg);
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i2c->state = STATE_START;
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}
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} else {
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/* send stop */
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s3c24xx_i2c_stop(i2c, 0);
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}
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break;
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case STATE_READ:
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/* we have a byte of data in the data register, do
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* something with it, and then work out wether we are
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* going to do any more read/write
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*/
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if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) &&
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!(is_msglast(i2c) && is_lastmsg(i2c))) {
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if (iicstat & S3C2410_IICSTAT_LASTBIT) {
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dev_dbg(i2c->dev, "READ: No Ack\n");
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s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
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goto out_ack;
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}
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}
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byte = readb(i2c->regs + S3C2410_IICDS);
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i2c->msg->buf[i2c->msg_ptr++] = byte;
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prepare_read:
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if (is_msglast(i2c)) {
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/* last byte of buffer */
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if (is_lastmsg(i2c))
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s3c24xx_i2c_disable_ack(i2c);
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} else if (is_msgend(i2c)) {
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/* ok, we've read the entire buffer, see if there
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* is anything else we need to do */
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if (is_lastmsg(i2c)) {
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/* last message, send stop and complete */
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dev_dbg(i2c->dev, "READ: Send Stop\n");
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s3c24xx_i2c_stop(i2c, 0);
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} else {
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/* go to the next transfer */
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dev_dbg(i2c->dev, "READ: Next Transfer\n");
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i2c->msg_ptr = 0;
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i2c->msg_idx++;
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i2c->msg++;
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}
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}
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break;
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}
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/* acknowlegde the IRQ and get back on with the work */
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out_ack:
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tmp = readl(i2c->regs + S3C2410_IICCON);
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tmp &= ~S3C2410_IICCON_IRQPEND;
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writel(tmp, i2c->regs + S3C2410_IICCON);
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out:
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return ret;
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}
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/* s3c24xx_i2c_irq
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*
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* top level IRQ servicing routine
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*/
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static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
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{
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struct s3c24xx_i2c *i2c = dev_id;
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unsigned long status;
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unsigned long tmp;
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status = readl(i2c->regs + S3C2410_IICSTAT);
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if (status & S3C2410_IICSTAT_ARBITR) {
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// deal with arbitration loss
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dev_err(i2c->dev, "deal with arbitration loss\n");
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}
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if (i2c->state == STATE_IDLE) {
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dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
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tmp = readl(i2c->regs + S3C2410_IICCON);
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tmp &= ~S3C2410_IICCON_IRQPEND;
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writel(tmp, i2c->regs + S3C2410_IICCON);
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goto out;
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}
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/* pretty much this leaves us with the fact that we've
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* transmitted or received whatever byte we last sent */
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i2s_s3c_irq_nextbyte(i2c, status);
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out:
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return IRQ_HANDLED;
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}
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/* s3c24xx_i2c_set_master
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*
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* get the i2c bus for a master transaction
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*/
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static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
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{
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unsigned long iicstat;
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int timeout = 400;
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while (timeout-- > 0) {
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iicstat = readl(i2c->regs + S3C2410_IICSTAT);
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if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
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return 0;
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msleep(1);
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}
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dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",
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__raw_readl(S3C2410_GPEDAT));
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return -ETIMEDOUT;
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}
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/* s3c24xx_i2c_doxfer
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*
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* this starts an i2c transfer
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*/
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static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num)
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{
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unsigned long timeout;
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int ret;
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ret = s3c24xx_i2c_set_master(i2c);
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if (ret != 0) {
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dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
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ret = -EAGAIN;
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goto out;
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}
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spin_lock_irq(&i2c->lock);
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i2c->msg = msgs;
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i2c->msg_num = num;
|
|
i2c->msg_ptr = 0;
|
|
i2c->msg_idx = 0;
|
|
i2c->state = STATE_START;
|
|
|
|
s3c24xx_i2c_enable_irq(i2c);
|
|
s3c24xx_i2c_message_start(i2c, msgs);
|
|
spin_unlock_irq(&i2c->lock);
|
|
|
|
timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
|
|
|
|
ret = i2c->msg_idx;
|
|
|
|
/* having these next two as dev_err() makes life very
|
|
* noisy when doing an i2cdetect */
|
|
|
|
if (timeout == 0)
|
|
dev_dbg(i2c->dev, "timeout\n");
|
|
else if (ret != num)
|
|
dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
|
|
|
|
/* ensure the stop has been through the bus */
|
|
|
|
msleep(1);
|
|
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
/* s3c24xx_i2c_xfer
|
|
*
|
|
* first port of call from the i2c bus code when an message needs
|
|
* transferring across the i2c bus.
|
|
*/
|
|
|
|
static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
|
|
struct i2c_msg *msgs, int num)
|
|
{
|
|
struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
|
|
int retry;
|
|
int ret;
|
|
|
|
for (retry = 0; retry < adap->retries; retry++) {
|
|
|
|
ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
|
|
|
|
if (ret != -EAGAIN)
|
|
return ret;
|
|
|
|
dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
|
|
|
|
udelay(100);
|
|
}
|
|
|
|
return -EREMOTEIO;
|
|
}
|
|
|
|
/* declare our i2c functionality */
|
|
static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
|
|
{
|
|
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
|
|
}
|
|
|
|
/* i2c bus registration info */
|
|
|
|
static const struct i2c_algorithm s3c24xx_i2c_algorithm = {
|
|
.master_xfer = s3c24xx_i2c_xfer,
|
|
.functionality = s3c24xx_i2c_func,
|
|
};
|
|
|
|
static struct s3c24xx_i2c s3c24xx_i2c = {
|
|
.lock = __SPIN_LOCK_UNLOCKED(s3c24xx_i2c.lock),
|
|
.wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),
|
|
.tx_setup = 50,
|
|
.adap = {
|
|
.name = "s3c2410-i2c",
|
|
.owner = THIS_MODULE,
|
|
.algo = &s3c24xx_i2c_algorithm,
|
|
.retries = 2,
|
|
.class = I2C_CLASS_HWMON,
|
|
},
|
|
};
|
|
|
|
/* s3c24xx_i2c_calcdivisor
|
|
*
|
|
* return the divisor settings for a given frequency
|
|
*/
|
|
|
|
static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
|
|
unsigned int *div1, unsigned int *divs)
|
|
{
|
|
unsigned int calc_divs = clkin / wanted;
|
|
unsigned int calc_div1;
|
|
|
|
if (calc_divs > (16*16))
|
|
calc_div1 = 512;
|
|
else
|
|
calc_div1 = 16;
|
|
|
|
calc_divs += calc_div1-1;
|
|
calc_divs /= calc_div1;
|
|
|
|
if (calc_divs == 0)
|
|
calc_divs = 1;
|
|
if (calc_divs > 17)
|
|
calc_divs = 17;
|
|
|
|
*divs = calc_divs;
|
|
*div1 = calc_div1;
|
|
|
|
return clkin / (calc_divs * calc_div1);
|
|
}
|
|
|
|
/* freq_acceptable
|
|
*
|
|
* test wether a frequency is within the acceptable range of error
|
|
*/
|
|
|
|
static inline int freq_acceptable(unsigned int freq, unsigned int wanted)
|
|
{
|
|
int diff = freq - wanted;
|
|
|
|
return (diff >= -2 && diff <= 2);
|
|
}
|
|
|
|
/* s3c24xx_i2c_getdivisor
|
|
*
|
|
* work out a divisor for the user requested frequency setting,
|
|
* either by the requested frequency, or scanning the acceptable
|
|
* range of frequencies until something is found
|
|
*/
|
|
|
|
static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c,
|
|
struct s3c2410_platform_i2c *pdata,
|
|
unsigned long *iicon,
|
|
unsigned int *got)
|
|
{
|
|
unsigned long clkin = clk_get_rate(i2c->clk);
|
|
|
|
unsigned int divs, div1;
|
|
int freq;
|
|
int start, end;
|
|
|
|
clkin /= 1000; /* clkin now in KHz */
|
|
|
|
dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
|
|
pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
|
|
|
|
if (pdata->bus_freq != 0) {
|
|
freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000,
|
|
&div1, &divs);
|
|
if (freq_acceptable(freq, pdata->bus_freq/1000))
|
|
goto found;
|
|
}
|
|
|
|
/* ok, we may have to search for something suitable... */
|
|
|
|
start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq;
|
|
end = pdata->min_freq;
|
|
|
|
start /= 1000;
|
|
end /= 1000;
|
|
|
|
/* search loop... */
|
|
|
|
for (; start > end; start--) {
|
|
freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs);
|
|
if (freq_acceptable(freq, start))
|
|
goto found;
|
|
}
|
|
|
|
/* cannot find frequency spec */
|
|
|
|
return -EINVAL;
|
|
|
|
found:
|
|
*got = freq;
|
|
*iicon |= (divs-1);
|
|
*iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0;
|
|
return 0;
|
|
}
|
|
|
|
/* s3c24xx_i2c_init
|
|
*
|
|
* initialise the controller, set the IO lines and frequency
|
|
*/
|
|
|
|
static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
|
|
{
|
|
unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
|
|
struct s3c2410_platform_i2c *pdata;
|
|
unsigned int freq;
|
|
|
|
/* get the plafrom data */
|
|
|
|
pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);
|
|
|
|
/* inititalise the gpio */
|
|
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
|
|
|
|
/* write slave address */
|
|
|
|
writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
|
|
|
|
dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
|
|
|
|
/* we need to work out the divisors for the clock... */
|
|
|
|
if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) {
|
|
dev_err(i2c->dev, "cannot meet bus frequency required\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* todo - check that the i2c lines aren't being dragged anywhere */
|
|
|
|
dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
|
|
dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
|
|
|
|
writel(iicon, i2c->regs + S3C2410_IICCON);
|
|
|
|
/* check for s3c2440 i2c controller */
|
|
|
|
if (s3c24xx_i2c_is2440(i2c)) {
|
|
dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay);
|
|
|
|
writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* s3c24xx_i2c_probe
|
|
*
|
|
* called by the bus driver when a suitable device is found
|
|
*/
|
|
|
|
static int s3c24xx_i2c_probe(struct platform_device *pdev)
|
|
{
|
|
struct s3c24xx_i2c *i2c = &s3c24xx_i2c;
|
|
struct resource *res;
|
|
int ret;
|
|
|
|
/* find the clock and enable it */
|
|
|
|
i2c->dev = &pdev->dev;
|
|
i2c->clk = clk_get(&pdev->dev, "i2c");
|
|
if (IS_ERR(i2c->clk)) {
|
|
dev_err(&pdev->dev, "cannot get clock\n");
|
|
ret = -ENOENT;
|
|
goto err_noclk;
|
|
}
|
|
|
|
dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
|
|
|
|
clk_enable(i2c->clk);
|
|
|
|
/* map the registers */
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (res == NULL) {
|
|
dev_err(&pdev->dev, "cannot find IO resource\n");
|
|
ret = -ENOENT;
|
|
goto err_clk;
|
|
}
|
|
|
|
i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1,
|
|
pdev->name);
|
|
|
|
if (i2c->ioarea == NULL) {
|
|
dev_err(&pdev->dev, "cannot request IO\n");
|
|
ret = -ENXIO;
|
|
goto err_clk;
|
|
}
|
|
|
|
i2c->regs = ioremap(res->start, (res->end-res->start)+1);
|
|
|
|
if (i2c->regs == NULL) {
|
|
dev_err(&pdev->dev, "cannot map IO\n");
|
|
ret = -ENXIO;
|
|
goto err_ioarea;
|
|
}
|
|
|
|
dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);
|
|
|
|
/* setup info block for the i2c core */
|
|
|
|
i2c->adap.algo_data = i2c;
|
|
i2c->adap.dev.parent = &pdev->dev;
|
|
|
|
/* initialise the i2c controller */
|
|
|
|
ret = s3c24xx_i2c_init(i2c);
|
|
if (ret != 0)
|
|
goto err_iomap;
|
|
|
|
/* find the IRQ for this unit (note, this relies on the init call to
|
|
* ensure no current IRQs pending
|
|
*/
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
if (res == NULL) {
|
|
dev_err(&pdev->dev, "cannot find IRQ\n");
|
|
ret = -ENOENT;
|
|
goto err_iomap;
|
|
}
|
|
|
|
ret = request_irq(res->start, s3c24xx_i2c_irq, IRQF_DISABLED,
|
|
pdev->name, i2c);
|
|
|
|
if (ret != 0) {
|
|
dev_err(&pdev->dev, "cannot claim IRQ\n");
|
|
goto err_iomap;
|
|
}
|
|
|
|
i2c->irq = res;
|
|
|
|
dev_dbg(&pdev->dev, "irq resource %p (%lu)\n", res,
|
|
(unsigned long)res->start);
|
|
|
|
ret = i2c_add_adapter(&i2c->adap);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "failed to add bus to i2c core\n");
|
|
goto err_irq;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, i2c);
|
|
|
|
dev_info(&pdev->dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
|
|
return 0;
|
|
|
|
err_irq:
|
|
free_irq(i2c->irq->start, i2c);
|
|
|
|
err_iomap:
|
|
iounmap(i2c->regs);
|
|
|
|
err_ioarea:
|
|
release_resource(i2c->ioarea);
|
|
kfree(i2c->ioarea);
|
|
|
|
err_clk:
|
|
clk_disable(i2c->clk);
|
|
clk_put(i2c->clk);
|
|
|
|
err_noclk:
|
|
return ret;
|
|
}
|
|
|
|
/* s3c24xx_i2c_remove
|
|
*
|
|
* called when device is removed from the bus
|
|
*/
|
|
|
|
static int s3c24xx_i2c_remove(struct platform_device *pdev)
|
|
{
|
|
struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
|
|
|
|
i2c_del_adapter(&i2c->adap);
|
|
free_irq(i2c->irq->start, i2c);
|
|
|
|
clk_disable(i2c->clk);
|
|
clk_put(i2c->clk);
|
|
|
|
iounmap(i2c->regs);
|
|
|
|
release_resource(i2c->ioarea);
|
|
kfree(i2c->ioarea);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int s3c24xx_i2c_resume(struct platform_device *dev)
|
|
{
|
|
struct s3c24xx_i2c *i2c = platform_get_drvdata(dev);
|
|
|
|
if (i2c != NULL)
|
|
s3c24xx_i2c_init(i2c);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#else
|
|
#define s3c24xx_i2c_resume NULL
|
|
#endif
|
|
|
|
/* device driver for platform bus bits */
|
|
|
|
static struct platform_driver s3c2410_i2c_driver = {
|
|
.probe = s3c24xx_i2c_probe,
|
|
.remove = s3c24xx_i2c_remove,
|
|
.resume = s3c24xx_i2c_resume,
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = "s3c2410-i2c",
|
|
},
|
|
};
|
|
|
|
static struct platform_driver s3c2440_i2c_driver = {
|
|
.probe = s3c24xx_i2c_probe,
|
|
.remove = s3c24xx_i2c_remove,
|
|
.resume = s3c24xx_i2c_resume,
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = "s3c2440-i2c",
|
|
},
|
|
};
|
|
|
|
static int __init i2c_adap_s3c_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = platform_driver_register(&s3c2410_i2c_driver);
|
|
if (ret == 0) {
|
|
ret = platform_driver_register(&s3c2440_i2c_driver);
|
|
if (ret)
|
|
platform_driver_unregister(&s3c2410_i2c_driver);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit i2c_adap_s3c_exit(void)
|
|
{
|
|
platform_driver_unregister(&s3c2410_i2c_driver);
|
|
platform_driver_unregister(&s3c2440_i2c_driver);
|
|
}
|
|
|
|
module_init(i2c_adap_s3c_init);
|
|
module_exit(i2c_adap_s3c_exit);
|
|
|
|
MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
|
|
MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
|
|
MODULE_LICENSE("GPL");
|