029e9f7366
IA32-Intel Devel guide Volume 3A - 14.3.2.1 ------------------------------------------- ... Opportunistic processor performance operation can be disabled by setting bit 38 of IA32_MISC_ENABLES. This mechanism is intended for BIOS only. If IA32_MISC_ENABLES[38] is set, CPUID.06H:EAX[1] will return 0. Better detect things via cpuid, this cleans up the code a bit and the MSR parts were not working correctly anyway. Signed-off-by: Thomas Renninger <trenn@suse.de> CC: lenb@kernel.org CC: linux@dominikbrodowski.net CC: cpufreq@vger.kernel.org Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
116 lines
2.3 KiB
C
116 lines
2.3 KiB
C
#if defined(__i386__) || defined(__x86_64__)
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#include <fcntl.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <stdint.h>
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#include "helpers/helpers.h"
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/* Intel specific MSRs */
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#define MSR_IA32_PERF_STATUS 0x198
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#define MSR_IA32_MISC_ENABLES 0x1a0
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#define MSR_IA32_ENERGY_PERF_BIAS 0x1b0
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#define MSR_NEHALEM_TURBO_RATIO_LIMIT 0x1ad
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/*
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* read_msr
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*
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* Will return 0 on success and -1 on failure.
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* Possible errno values could be:
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* EFAULT -If the read/write did not fully complete
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* EIO -If the CPU does not support MSRs
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* ENXIO -If the CPU does not exist
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*/
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int read_msr(int cpu, unsigned int idx, unsigned long long *val)
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{
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int fd;
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char msr_file_name[64];
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sprintf(msr_file_name, "/dev/cpu/%d/msr", cpu);
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fd = open(msr_file_name, O_RDONLY);
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if (fd < 0)
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return -1;
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if (lseek(fd, idx, SEEK_CUR) == -1)
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goto err;
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if (read(fd, val, sizeof *val) != sizeof *val)
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goto err;
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close(fd);
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return 0;
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err:
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close(fd);
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return -1;
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}
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/*
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* write_msr
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*
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* Will return 0 on success and -1 on failure.
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* Possible errno values could be:
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* EFAULT -If the read/write did not fully complete
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* EIO -If the CPU does not support MSRs
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* ENXIO -If the CPU does not exist
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*/
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int write_msr(int cpu, unsigned int idx, unsigned long long val)
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{
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int fd;
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char msr_file_name[64];
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sprintf(msr_file_name, "/dev/cpu/%d/msr", cpu);
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fd = open(msr_file_name, O_WRONLY);
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if (fd < 0)
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return -1;
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if (lseek(fd, idx, SEEK_CUR) == -1)
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goto err;
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if (write(fd, &val, sizeof val) != sizeof val)
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goto err;
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close(fd);
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return 0;
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err:
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close(fd);
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return -1;
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}
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int msr_intel_get_perf_bias(unsigned int cpu)
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{
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unsigned long long val;
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int ret;
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if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_PERF_BIAS))
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return -1;
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ret = read_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &val);
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if (ret)
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return ret;
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return val;
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}
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int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val)
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{
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int ret;
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if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_PERF_BIAS))
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return -1;
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ret = write_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, val);
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if (ret)
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return ret;
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return 0;
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}
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unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu)
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{
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unsigned long long val;
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int ret;
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if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_HAS_TURBO_RATIO))
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return -1;
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ret = read_msr(cpu, MSR_NEHALEM_TURBO_RATIO_LIMIT, &val);
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if (ret)
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return ret;
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return val;
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}
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#endif
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