![Eugene Surovegin](/assets/img/avatar_default.png)
This patch replaces current PowerPC 4xx EMAC driver with new, re-written from the scratch version. This patch is quite big (~234K) because there is virtualy 0% of common code between old and new version. New driver uses NAPI, it solves stability problems under heavy packet load and low memory, corrects chip register access and fixes numerous small bugs I don't even remember now. This patch has been tested on all supported in 2.6 PPC 4xx boards. It's been used in production for almost a year now on custom 4xx hardware. PPC32 specific parts are already upstream. Patch was acked by the current EMAC driver maintainer (Matt Porter). I will be maintaining this new version. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> -- Kconfig | 72 ibm_emac/Makefile | 13 ibm_emac/ibm_emac.h | 418 +++-- ibm_emac/ibm_emac_core.c | 3414 ++++++++++++++++++++++++---------------------- ibm_emac/ibm_emac_core.h | 313 ++-- ibm_emac/ibm_emac_debug.c | 377 ++--- ibm_emac/ibm_emac_debug.h | 63 ibm_emac/ibm_emac_mal.c | 674 +++++---- ibm_emac/ibm_emac_mal.h | 336 +++- ibm_emac/ibm_emac_phy.c | 335 ++-- ibm_emac/ibm_emac_phy.h | 105 - ibm_emac/ibm_emac_rgmii.c | 201 ++ ibm_emac/ibm_emac_rgmii.h | 68 ibm_emac/ibm_emac_tah.c | 111 + ibm_emac/ibm_emac_tah.h | 96 - ibm_emac/ibm_emac_zmii.c | 255 +++ ibm_emac/ibm_emac_zmii.h | 114 - 17 files changed, 4114 insertions(+), 2851 deletions(-) Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
214 lines
6.2 KiB
C
214 lines
6.2 KiB
C
/*
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* drivers/net/ibm_emac/ibm_emac_debug.c
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*
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* Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
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*
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* Copyright (c) 2004, 2005 Zultys Technologies
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* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/netdevice.h>
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#include <linux/sysrq.h>
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#include <asm/io.h>
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#include "ibm_emac_core.h"
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static void emac_desc_dump(int idx, struct ocp_enet_private *p)
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{
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int i;
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printk("** EMAC%d TX BDs **\n"
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" tx_cnt = %d tx_slot = %d ack_slot = %d\n",
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idx, p->tx_cnt, p->tx_slot, p->ack_slot);
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for (i = 0; i < NUM_TX_BUFF / 2; ++i)
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printk
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("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
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i, p->tx_desc[i].data_ptr, p->tx_skb[i] ? 'V' : ' ',
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p->tx_desc[i].ctrl, p->tx_desc[i].data_len,
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NUM_TX_BUFF / 2 + i,
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p->tx_desc[NUM_TX_BUFF / 2 + i].data_ptr,
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p->tx_skb[NUM_TX_BUFF / 2 + i] ? 'V' : ' ',
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p->tx_desc[NUM_TX_BUFF / 2 + i].ctrl,
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p->tx_desc[NUM_TX_BUFF / 2 + i].data_len);
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printk("** EMAC%d RX BDs **\n"
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" rx_slot = %d rx_stopped = %d rx_skb_size = %d rx_sync_size = %d\n"
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" rx_sg_skb = 0x%p\n",
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idx, p->rx_slot, p->commac.rx_stopped, p->rx_skb_size,
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p->rx_sync_size, p->rx_sg_skb);
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for (i = 0; i < NUM_RX_BUFF / 2; ++i)
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printk
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("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
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i, p->rx_desc[i].data_ptr, p->rx_skb[i] ? 'V' : ' ',
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p->rx_desc[i].ctrl, p->rx_desc[i].data_len,
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NUM_RX_BUFF / 2 + i,
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p->rx_desc[NUM_RX_BUFF / 2 + i].data_ptr,
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p->rx_skb[NUM_RX_BUFF / 2 + i] ? 'V' : ' ',
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p->rx_desc[NUM_RX_BUFF / 2 + i].ctrl,
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p->rx_desc[NUM_RX_BUFF / 2 + i].data_len);
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}
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static void emac_mac_dump(int idx, struct ocp_enet_private *dev)
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{
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struct emac_regs *p = dev->emacp;
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printk("** EMAC%d registers **\n"
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"MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
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"RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n"
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"IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n"
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"IAHT: 0x%04x 0x%04x 0x%04x 0x%04x "
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"GAHT: 0x%04x 0x%04x 0x%04x 0x%04x\n"
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"LSA = %04x%08x IPGVR = 0x%04x\n"
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"STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
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"OCTX = 0x%08x OCRX = 0x%08x IPCR = 0x%08x\n",
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idx, in_be32(&p->mr0), in_be32(&p->mr1),
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in_be32(&p->tmr0), in_be32(&p->tmr1),
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in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser),
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in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid),
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in_be32(&p->vtci),
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in_be32(&p->iaht1), in_be32(&p->iaht2), in_be32(&p->iaht3),
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in_be32(&p->iaht4),
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in_be32(&p->gaht1), in_be32(&p->gaht2), in_be32(&p->gaht3),
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in_be32(&p->gaht4),
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in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr),
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in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr),
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in_be32(&p->octx), in_be32(&p->ocrx), in_be32(&p->ipcr)
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);
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emac_desc_dump(idx, dev);
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}
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static void emac_mal_dump(struct ibm_ocp_mal *mal)
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{
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struct ocp_func_mal_data *maldata = mal->def->additions;
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int i;
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printk("** MAL%d Registers **\n"
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"CFG = 0x%08x ESR = 0x%08x IER = 0x%08x\n"
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"TX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n"
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"RX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n",
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mal->def->index,
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get_mal_dcrn(mal, MAL_CFG), get_mal_dcrn(mal, MAL_ESR),
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get_mal_dcrn(mal, MAL_IER),
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get_mal_dcrn(mal, MAL_TXCASR), get_mal_dcrn(mal, MAL_TXCARR),
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get_mal_dcrn(mal, MAL_TXEOBISR), get_mal_dcrn(mal, MAL_TXDEIR),
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get_mal_dcrn(mal, MAL_RXCASR), get_mal_dcrn(mal, MAL_RXCARR),
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get_mal_dcrn(mal, MAL_RXEOBISR), get_mal_dcrn(mal, MAL_RXDEIR)
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);
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printk("TX|");
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for (i = 0; i < maldata->num_tx_chans; ++i) {
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if (i && !(i % 4))
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printk("\n ");
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printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_TXCTPR(i)));
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}
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printk("\nRX|");
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for (i = 0; i < maldata->num_rx_chans; ++i) {
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if (i && !(i % 4))
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printk("\n ");
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printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_RXCTPR(i)));
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}
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printk("\n ");
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for (i = 0; i < maldata->num_rx_chans; ++i) {
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u32 r = get_mal_dcrn(mal, MAL_RCBS(i));
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if (i && !(i % 3))
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printk("\n ");
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printk("RCBS%d = 0x%08x (%d) ", i, r, r * 16);
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}
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printk("\n");
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}
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static struct ocp_enet_private *__emacs[4];
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static struct ibm_ocp_mal *__mals[1];
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void emac_dbg_register(int idx, struct ocp_enet_private *dev)
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{
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unsigned long flags;
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if (idx >= sizeof(__emacs) / sizeof(__emacs[0])) {
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printk(KERN_WARNING
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"invalid index %d when registering EMAC for debugging\n",
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idx);
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return;
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}
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local_irq_save(flags);
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__emacs[idx] = dev;
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local_irq_restore(flags);
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}
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void mal_dbg_register(int idx, struct ibm_ocp_mal *mal)
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{
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unsigned long flags;
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if (idx >= sizeof(__mals) / sizeof(__mals[0])) {
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printk(KERN_WARNING
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"invalid index %d when registering MAL for debugging\n",
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idx);
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return;
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}
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local_irq_save(flags);
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__mals[idx] = mal;
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local_irq_restore(flags);
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}
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void emac_dbg_dump_all(void)
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{
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unsigned int i;
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unsigned long flags;
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local_irq_save(flags);
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for (i = 0; i < sizeof(__mals) / sizeof(__mals[0]); ++i)
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if (__mals[i])
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emac_mal_dump(__mals[i]);
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for (i = 0; i < sizeof(__emacs) / sizeof(__emacs[0]); ++i)
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if (__emacs[i])
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emac_mac_dump(i, __emacs[i]);
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local_irq_restore(flags);
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}
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#if defined(CONFIG_MAGIC_SYSRQ)
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static void emac_sysrq_handler(int key, struct pt_regs *pt_regs,
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struct tty_struct *tty)
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{
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emac_dbg_dump_all();
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}
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static struct sysrq_key_op emac_sysrq_op = {
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.handler = emac_sysrq_handler,
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.help_msg = "emaC",
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.action_msg = "Show EMAC(s) status",
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};
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int __init emac_init_debug(void)
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{
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return register_sysrq_key('c', &emac_sysrq_op);
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}
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void __exit emac_fini_debug(void)
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{
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unregister_sysrq_key('c', &emac_sysrq_op);
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}
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#else
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int __init emac_init_debug(void)
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{
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return 0;
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}
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void __exit emac_fini_debug(void)
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{
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}
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#endif /* CONFIG_MAGIC_SYSRQ */
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