![Eugene Surovegin](/assets/img/avatar_default.png)
This patch replaces current PowerPC 4xx EMAC driver with new, re-written from the scratch version. This patch is quite big (~234K) because there is virtualy 0% of common code between old and new version. New driver uses NAPI, it solves stability problems under heavy packet load and low memory, corrects chip register access and fixes numerous small bugs I don't even remember now. This patch has been tested on all supported in 2.6 PPC 4xx boards. It's been used in production for almost a year now on custom 4xx hardware. PPC32 specific parts are already upstream. Patch was acked by the current EMAC driver maintainer (Matt Porter). I will be maintaining this new version. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> -- Kconfig | 72 ibm_emac/Makefile | 13 ibm_emac/ibm_emac.h | 418 +++-- ibm_emac/ibm_emac_core.c | 3414 ++++++++++++++++++++++++---------------------- ibm_emac/ibm_emac_core.h | 313 ++-- ibm_emac/ibm_emac_debug.c | 377 ++--- ibm_emac/ibm_emac_debug.h | 63 ibm_emac/ibm_emac_mal.c | 674 +++++---- ibm_emac/ibm_emac_mal.h | 336 +++- ibm_emac/ibm_emac_phy.c | 335 ++-- ibm_emac/ibm_emac_phy.h | 105 - ibm_emac/ibm_emac_rgmii.c | 201 ++ ibm_emac/ibm_emac_rgmii.h | 68 ibm_emac/ibm_emac_tah.c | 111 + ibm_emac/ibm_emac_tah.h | 96 - ibm_emac/ibm_emac_zmii.c | 255 +++ ibm_emac/ibm_emac_zmii.h | 114 - 17 files changed, 4114 insertions(+), 2851 deletions(-) Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
222 lines
5.3 KiB
C
222 lines
5.3 KiB
C
/*
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* drivers/net/ibm_emac/ibm_emac_core.h
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*
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* Driver for PowerPC 4xx on-chip ethernet controller.
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*
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* Copyright (c) 2004, 2005 Zultys Technologies.
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* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
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*
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* Based on original work by
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* Armin Kuster <akuster@mvista.com>
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* Johnnie Peters <jpeters@mvista.com>
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* Copyright 2000, 2001 MontaVista Softare Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __IBM_EMAC_CORE_H_
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#define __IBM_EMAC_CORE_H_
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#include <linux/config.h>
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#include <linux/netdevice.h>
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#include <linux/dma-mapping.h>
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#include <asm/ocp.h>
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#include "ibm_emac.h"
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#include "ibm_emac_phy.h"
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#include "ibm_emac_zmii.h"
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#include "ibm_emac_rgmii.h"
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#include "ibm_emac_mal.h"
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#include "ibm_emac_tah.h"
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#define NUM_TX_BUFF CONFIG_IBM_EMAC_TXB
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#define NUM_RX_BUFF CONFIG_IBM_EMAC_RXB
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/* Simple sanity check */
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#if NUM_TX_BUFF > 256 || NUM_RX_BUFF > 256
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#error Invalid number of buffer descriptors (greater than 256)
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#endif
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// XXX
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#define EMAC_MIN_MTU 46
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#define EMAC_MAX_MTU 9000
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/* Maximum L2 header length (VLAN tagged, no FCS) */
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#define EMAC_MTU_OVERHEAD (6 * 2 + 2 + 4)
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/* RX BD size for the given MTU */
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static inline int emac_rx_size(int mtu)
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{
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if (mtu > ETH_DATA_LEN)
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return MAL_MAX_RX_SIZE;
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else
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return mal_rx_size(ETH_DATA_LEN + EMAC_MTU_OVERHEAD);
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}
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#define EMAC_DMA_ALIGN(x) ALIGN((x), dma_get_cache_alignment())
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#define EMAC_RX_SKB_HEADROOM \
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EMAC_DMA_ALIGN(CONFIG_IBM_EMAC_RX_SKB_HEADROOM)
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/* Size of RX skb for the given MTU */
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static inline int emac_rx_skb_size(int mtu)
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{
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int size = max(mtu + EMAC_MTU_OVERHEAD, emac_rx_size(mtu));
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return EMAC_DMA_ALIGN(size + 2) + EMAC_RX_SKB_HEADROOM;
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}
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/* RX DMA sync size */
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static inline int emac_rx_sync_size(int mtu)
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{
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return EMAC_DMA_ALIGN(emac_rx_size(mtu) + 2);
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}
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/* Driver statistcs is split into two parts to make it more cache friendly:
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* - normal statistics (packet count, etc)
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* - error statistics
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*
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* When statistics is requested by ethtool, these parts are concatenated,
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* normal one goes first.
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*
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* Please, keep these structures in sync with emac_stats_keys.
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*/
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/* Normal TX/RX Statistics */
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struct ibm_emac_stats {
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u64 rx_packets;
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u64 rx_bytes;
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u64 tx_packets;
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u64 tx_bytes;
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u64 rx_packets_csum;
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u64 tx_packets_csum;
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};
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/* Error statistics */
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struct ibm_emac_error_stats {
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u64 tx_undo;
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/* Software RX Errors */
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u64 rx_dropped_stack;
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u64 rx_dropped_oom;
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u64 rx_dropped_error;
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u64 rx_dropped_resize;
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u64 rx_dropped_mtu;
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u64 rx_stopped;
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/* BD reported RX errors */
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u64 rx_bd_errors;
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u64 rx_bd_overrun;
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u64 rx_bd_bad_packet;
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u64 rx_bd_runt_packet;
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u64 rx_bd_short_event;
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u64 rx_bd_alignment_error;
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u64 rx_bd_bad_fcs;
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u64 rx_bd_packet_too_long;
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u64 rx_bd_out_of_range;
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u64 rx_bd_in_range;
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/* EMAC IRQ reported RX errors */
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u64 rx_parity;
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u64 rx_fifo_overrun;
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u64 rx_overrun;
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u64 rx_bad_packet;
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u64 rx_runt_packet;
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u64 rx_short_event;
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u64 rx_alignment_error;
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u64 rx_bad_fcs;
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u64 rx_packet_too_long;
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u64 rx_out_of_range;
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u64 rx_in_range;
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/* Software TX Errors */
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u64 tx_dropped;
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/* BD reported TX errors */
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u64 tx_bd_errors;
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u64 tx_bd_bad_fcs;
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u64 tx_bd_carrier_loss;
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u64 tx_bd_excessive_deferral;
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u64 tx_bd_excessive_collisions;
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u64 tx_bd_late_collision;
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u64 tx_bd_multple_collisions;
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u64 tx_bd_single_collision;
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u64 tx_bd_underrun;
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u64 tx_bd_sqe;
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/* EMAC IRQ reported TX errors */
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u64 tx_parity;
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u64 tx_underrun;
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u64 tx_sqe;
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u64 tx_errors;
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};
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#define EMAC_ETHTOOL_STATS_COUNT ((sizeof(struct ibm_emac_stats) + \
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sizeof(struct ibm_emac_error_stats)) \
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/ sizeof(u64))
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struct ocp_enet_private {
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struct net_device *ndev; /* 0 */
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struct emac_regs *emacp;
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struct mal_descriptor *tx_desc;
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int tx_cnt;
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int tx_slot;
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int ack_slot;
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struct mal_descriptor *rx_desc;
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int rx_slot;
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struct sk_buff *rx_sg_skb; /* 1 */
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int rx_skb_size;
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int rx_sync_size;
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struct ibm_emac_stats stats;
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struct ocp_device *tah_dev;
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struct ibm_ocp_mal *mal;
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struct mal_commac commac;
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struct sk_buff *tx_skb[NUM_TX_BUFF];
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struct sk_buff *rx_skb[NUM_RX_BUFF];
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struct ocp_device *zmii_dev;
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int zmii_input;
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struct ocp_enet_private *mdio_dev;
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struct ocp_device *rgmii_dev;
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int rgmii_input;
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struct ocp_def *def;
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struct mii_phy phy;
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struct timer_list link_timer;
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int reset_failed;
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struct ibm_emac_error_stats estats;
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struct net_device_stats nstats;
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struct device* ldev;
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};
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/* Ethtool get_regs complex data.
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* We want to get not just EMAC registers, but also MAL, ZMII, RGMII, TAH
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* when available.
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*
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* Returned BLOB consists of the ibm_emac_ethtool_regs_hdr,
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* MAL registers, EMAC registers and optional ZMII, RGMII, TAH registers.
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* Each register component is preceded with emac_ethtool_regs_subhdr.
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* Order of the optional headers follows their relative bit posititions
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* in emac_ethtool_regs_hdr.components
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*/
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#define EMAC_ETHTOOL_REGS_ZMII 0x00000001
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#define EMAC_ETHTOOL_REGS_RGMII 0x00000002
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#define EMAC_ETHTOOL_REGS_TAH 0x00000004
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struct emac_ethtool_regs_hdr {
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u32 components;
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};
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struct emac_ethtool_regs_subhdr {
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u32 version;
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u32 index;
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};
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#endif /* __IBM_EMAC_CORE_H_ */
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