![Alex Chiang](/assets/img/avatar_default.png)
The x86 and ia64 implementations of arch_acpi_processor_init_pdc() are almost exactly the same. The only difference is in what bits they set in obj_list buffer. Combine the boilerplate memory management code, and leave the arch-specific bit twiddling in separate implementations. Cc: Tony Luck <tony.luck@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Len Brown <len.brown@intel.com>
155 lines
3.6 KiB
C
155 lines
3.6 KiB
C
#include <linux/dmi.h>
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#include <acpi/acpi_drivers.h>
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#include <acpi/processor.h>
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#include "internal.h"
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#define PREFIX "ACPI: "
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#define _COMPONENT ACPI_PROCESSOR_COMPONENT
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ACPI_MODULE_NAME("processor_pdc");
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static int set_no_mwait(const struct dmi_system_id *id)
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{
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printk(KERN_NOTICE PREFIX "%s detected - "
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"disabling mwait for CPU C-states\n", id->ident);
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idle_nomwait = 1;
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return 0;
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}
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static struct dmi_system_id __cpuinitdata processor_idle_dmi_table[] = {
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{
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set_no_mwait, "IFL91 board", {
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DMI_MATCH(DMI_BIOS_VENDOR, "COMPAL"),
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DMI_MATCH(DMI_SYS_VENDOR, "ZEPTO"),
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DMI_MATCH(DMI_PRODUCT_VERSION, "3215W"),
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DMI_MATCH(DMI_BOARD_NAME, "IFL91") }, NULL},
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{
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set_no_mwait, "Extensa 5220", {
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DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
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DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
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DMI_MATCH(DMI_PRODUCT_VERSION, "0100"),
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DMI_MATCH(DMI_BOARD_NAME, "Columbia") }, NULL},
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{},
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};
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static void acpi_processor_init_pdc(struct acpi_processor *pr)
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{
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struct acpi_object_list *obj_list;
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union acpi_object *obj;
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u32 *buf;
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pr->pdc = NULL;
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/* allocate and initialize pdc. It will be used later. */
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obj_list = kmalloc(sizeof(struct acpi_object_list), GFP_KERNEL);
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if (!obj_list) {
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printk(KERN_ERR "Memory allocation error\n");
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return;
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}
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obj = kmalloc(sizeof(union acpi_object), GFP_KERNEL);
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if (!obj) {
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printk(KERN_ERR "Memory allocation error\n");
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kfree(obj_list);
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return;
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}
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buf = kmalloc(12, GFP_KERNEL);
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if (!buf) {
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printk(KERN_ERR "Memory allocation error\n");
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kfree(obj);
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kfree(obj_list);
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return;
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}
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obj->type = ACPI_TYPE_BUFFER;
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obj->buffer.length = 12;
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obj->buffer.pointer = (u8 *) buf;
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obj_list->count = 1;
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obj_list->pointer = obj;
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pr->pdc = obj_list;
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/* Now let the arch do the bit-twiddling to buf[] */
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arch_acpi_processor_init_pdc(pr);
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return;
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}
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/*
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* _PDC is required for a BIOS-OS handshake for most of the newer
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* ACPI processor features.
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*/
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static int acpi_processor_eval_pdc(struct acpi_processor *pr)
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{
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struct acpi_object_list *pdc_in = pr->pdc;
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acpi_status status = AE_OK;
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if (!pdc_in)
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return status;
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if (idle_nomwait) {
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/*
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* If mwait is disabled for CPU C-states, the C2C3_FFH access
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* mode will be disabled in the parameter of _PDC object.
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* Of course C1_FFH access mode will also be disabled.
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*/
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union acpi_object *obj;
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u32 *buffer = NULL;
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obj = pdc_in->pointer;
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buffer = (u32 *)(obj->buffer.pointer);
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buffer[2] &= ~(ACPI_PDC_C_C2C3_FFH | ACPI_PDC_C_C1_FFH);
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}
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status = acpi_evaluate_object(pr->handle, "_PDC", pdc_in, NULL);
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if (ACPI_FAILURE(status))
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"Could not evaluate _PDC, using legacy perf. control.\n"));
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return status;
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}
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void acpi_processor_set_pdc(struct acpi_processor *pr)
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{
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if (arch_has_acpi_pdc() == false)
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return;
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acpi_processor_init_pdc(pr);
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acpi_processor_eval_pdc(pr);
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arch_acpi_processor_cleanup_pdc(pr);
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}
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EXPORT_SYMBOL_GPL(acpi_processor_set_pdc);
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static acpi_status
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early_init_pdc(acpi_handle handle, u32 lvl, void *context, void **rv)
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{
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struct acpi_processor pr;
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pr.handle = handle;
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/* x86 implementation looks at pr.id to determine some
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* CPU capabilites. We can just hard code to 0 since we're
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* assuming the CPUs in the system are homogenous and all
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* have the same capabilities.
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*/
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pr.id = 0;
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acpi_processor_set_pdc(&pr);
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return AE_OK;
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}
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void acpi_early_processor_set_pdc(void)
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{
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/*
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* Check whether the system is DMI table. If yes, OSPM
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* should not use mwait for CPU-states.
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*/
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dmi_check_system(processor_idle_dmi_table);
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acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
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ACPI_UINT32_MAX,
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early_init_pdc, NULL, NULL, NULL);
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}
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