![Raphael Assenat](/assets/img/avatar_default.png)
This patch fixes a bug where we obtain a smaller resolution than requested. (eg: in 640x480, only 639x479 usable pixels). This was due to 1 being substracted from the xres and yres vars two times: first in mbxfb.c and then in the macros from reg_bits.h. This patch removes the minus ones from the mbxfb.c file. Tested and works. Signed-off-by: Raphael Assenat <raph@8d.com> Signed-off-by: Antonino Daplas <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
695 lines
16 KiB
C
695 lines
16 KiB
C
/*
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* linux/drivers/video/mbx/mbxfb.c
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*
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* Copyright (C) 2006 Compulab, Ltd.
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* Mike Rapoport <mike@compulab.co.il>
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*
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* Based on pxafb.c
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*
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* Intel 2700G (Marathon) Graphics Accelerator Frame Buffer Driver
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*
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*/
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#include <video/mbxfb.h>
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#include "regs.h"
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#include "reg_bits.h"
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static unsigned long virt_base_2700;
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#define MIN_XRES 16
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#define MIN_YRES 16
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#define MAX_XRES 2048
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#define MAX_YRES 2048
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#define MAX_PALETTES 16
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/* FIXME: take care of different chip revisions with different sizes
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of ODFB */
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#define MEMORY_OFFSET 0x60000
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struct mbxfb_info {
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struct device *dev;
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struct resource *fb_res;
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struct resource *fb_req;
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struct resource *reg_res;
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struct resource *reg_req;
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void __iomem *fb_virt_addr;
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unsigned long fb_phys_addr;
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void __iomem *reg_virt_addr;
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unsigned long reg_phys_addr;
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int (*platform_probe) (struct fb_info * fb);
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int (*platform_remove) (struct fb_info * fb);
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u32 pseudo_palette[MAX_PALETTES];
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#ifdef CONFIG_FB_MBX_DEBUG
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void *debugfs_data;
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#endif
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};
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static struct fb_var_screeninfo mbxfb_default __devinitdata = {
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.xres = 640,
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.yres = 480,
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.xres_virtual = 640,
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.yres_virtual = 480,
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.bits_per_pixel = 16,
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.red = {11, 5, 0},
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.green = {5, 6, 0},
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.blue = {0, 5, 0},
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.activate = FB_ACTIVATE_TEST,
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.height = -1,
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.width = -1,
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.pixclock = 40000,
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.left_margin = 48,
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.right_margin = 16,
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.upper_margin = 33,
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.lower_margin = 10,
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.hsync_len = 96,
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.vsync_len = 2,
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.vmode = FB_VMODE_NONINTERLACED,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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};
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static struct fb_fix_screeninfo mbxfb_fix __devinitdata = {
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.id = "MBX",
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.type = FB_TYPE_PACKED_PIXELS,
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.visual = FB_VISUAL_TRUECOLOR,
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.xpanstep = 0,
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.ypanstep = 0,
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.ywrapstep = 0,
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.accel = FB_ACCEL_NONE,
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};
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struct pixclock_div {
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u8 m;
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u8 n;
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u8 p;
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};
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static unsigned int mbxfb_get_pixclock(unsigned int pixclock_ps,
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struct pixclock_div *div)
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{
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u8 m, n, p;
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unsigned int err = 0;
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unsigned int min_err = ~0x0;
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unsigned int clk;
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unsigned int best_clk = 0;
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unsigned int ref_clk = 13000; /* FIXME: take from platform data */
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unsigned int pixclock;
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/* convert pixclock to KHz */
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pixclock = PICOS2KHZ(pixclock_ps);
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/* PLL output freq = (ref_clk * M) / (N * 2^P)
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*
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* M: 1 to 63
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* N: 1 to 7
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* P: 0 to 7
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*/
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/* RAPH: When N==1, the resulting pixel clock appears to
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* get divided by 2. Preventing N=1 by starting the following
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* loop at 2 prevents this. Is this a bug with my chip
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* revision or something I dont understand? */
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for (m = 1; m < 64; m++) {
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for (n = 2; n < 8; n++) {
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for (p = 0; p < 8; p++) {
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clk = (ref_clk * m) / (n * (1 << p));
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err = (clk > pixclock) ? (clk - pixclock) :
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(pixclock - clk);
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if (err < min_err) {
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min_err = err;
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best_clk = clk;
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div->m = m;
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div->n = n;
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div->p = p;
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}
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}
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}
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}
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return KHZ2PICOS(best_clk);
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}
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static int mbxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int trans, struct fb_info *info)
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{
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u32 val, ret = 1;
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if (regno < MAX_PALETTES) {
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u32 *pal = info->pseudo_palette;
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val = (red & 0xf800) | ((green & 0xfc00) >> 5) |
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((blue & 0xf800) >> 11);
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pal[regno] = val;
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ret = 0;
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}
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return ret;
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}
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static int mbxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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struct pixclock_div div;
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var->pixclock = mbxfb_get_pixclock(var->pixclock, &div);
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if (var->xres < MIN_XRES)
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var->xres = MIN_XRES;
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if (var->yres < MIN_YRES)
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var->yres = MIN_YRES;
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if (var->xres > MAX_XRES)
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return -EINVAL;
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if (var->yres > MAX_YRES)
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return -EINVAL;
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var->xres_virtual = max(var->xres_virtual, var->xres);
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var->yres_virtual = max(var->yres_virtual, var->yres);
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switch (var->bits_per_pixel) {
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/* 8 bits-per-pixel is not supported yet */
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case 8:
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return -EINVAL;
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case 16:
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var->green.length = (var->green.length == 5) ? 5 : 6;
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var->red.length = 5;
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var->blue.length = 5;
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var->transp.length = 6 - var->green.length;
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var->blue.offset = 0;
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var->green.offset = 5;
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var->red.offset = 5 + var->green.length;
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var->transp.offset = (5 + var->red.offset) & 15;
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break;
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case 24: /* RGB 888 */
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case 32: /* RGBA 8888 */
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var->red.offset = 16;
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var->red.length = 8;
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var->green.offset = 8;
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var->green.length = 8;
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var->blue.offset = 0;
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var->blue.length = 8;
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var->transp.length = var->bits_per_pixel - 24;
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var->transp.offset = (var->transp.length) ? 24 : 0;
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break;
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}
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var->red.msb_right = 0;
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var->green.msb_right = 0;
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var->blue.msb_right = 0;
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var->transp.msb_right = 0;
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return 0;
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}
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static int mbxfb_set_par(struct fb_info *info)
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{
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struct fb_var_screeninfo *var = &info->var;
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struct pixclock_div div;
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ushort hbps, ht, hfps, has;
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ushort vbps, vt, vfps, vas;
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u32 gsctrl = readl(GSCTRL);
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u32 gsadr = readl(GSADR);
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info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
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/* setup color mode */
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gsctrl &= ~(FMsk(GSCTRL_GPIXFMT));
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/* FIXME: add *WORKING* support for 8-bits per color */
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if (info->var.bits_per_pixel == 8) {
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return -EINVAL;
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} else {
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fb_dealloc_cmap(&info->cmap);
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gsctrl &= ~GSCTRL_LUT_EN;
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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switch (info->var.bits_per_pixel) {
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case 16:
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if (info->var.green.length == 5)
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gsctrl |= GSCTRL_GPIXFMT_ARGB1555;
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else
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gsctrl |= GSCTRL_GPIXFMT_RGB565;
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break;
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case 24:
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gsctrl |= GSCTRL_GPIXFMT_RGB888;
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break;
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case 32:
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gsctrl |= GSCTRL_GPIXFMT_ARGB8888;
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break;
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}
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}
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/* setup resolution */
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gsctrl &= ~(FMsk(GSCTRL_GSWIDTH) | FMsk(GSCTRL_GSHEIGHT));
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gsctrl |= Gsctrl_Width(info->var.xres) |
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Gsctrl_Height(info->var.yres);
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writel(gsctrl, GSCTRL);
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udelay(1000);
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gsadr &= ~(FMsk(GSADR_SRCSTRIDE));
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gsadr |= Gsadr_Srcstride(info->var.xres * info->var.bits_per_pixel /
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(8 * 16) - 1);
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writel(gsadr, GSADR);
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udelay(1000);
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/* setup timings */
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var->pixclock = mbxfb_get_pixclock(info->var.pixclock, &div);
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writel((Disp_Pll_M(div.m) | Disp_Pll_N(div.n) |
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Disp_Pll_P(div.p) | DISP_PLL_EN), DISPPLL);
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hbps = var->hsync_len;
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has = hbps + var->left_margin;
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hfps = has + var->xres;
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ht = hfps + var->right_margin;
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vbps = var->vsync_len;
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vas = vbps + var->upper_margin;
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vfps = vas + var->yres;
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vt = vfps + var->lower_margin;
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writel((Dht01_Hbps(hbps) | Dht01_Ht(ht)), DHT01);
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writel((Dht02_Hlbs(has) | Dht02_Has(has)), DHT02);
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writel((Dht03_Hfps(hfps) | Dht03_Hrbs(hfps)), DHT03);
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writel((Dhdet_Hdes(has) | Dhdet_Hdef(hfps)), DHDET);
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writel((Dvt01_Vbps(vbps) | Dvt01_Vt(vt)), DVT01);
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writel((Dvt02_Vtbs(vas) | Dvt02_Vas(vas)), DVT02);
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writel((Dvt03_Vfps(vfps) | Dvt03_Vbbs(vfps)), DVT03);
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writel((Dvdet_Vdes(vas) | Dvdet_Vdef(vfps)), DVDET);
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writel((Dvectrl_Vevent(vfps) | Dvectrl_Vfetch(vbps)), DVECTRL);
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writel((readl(DSCTRL) | DSCTRL_SYNCGEN_EN), DSCTRL);
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return 0;
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}
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static int mbxfb_blank(int blank, struct fb_info *info)
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{
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switch (blank) {
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case FB_BLANK_POWERDOWN:
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case FB_BLANK_VSYNC_SUSPEND:
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case FB_BLANK_HSYNC_SUSPEND:
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case FB_BLANK_NORMAL:
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writel((readl(DSCTRL) & ~DSCTRL_SYNCGEN_EN), DSCTRL);
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udelay(1000);
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writel((readl(PIXCLK) & ~PIXCLK_EN), PIXCLK);
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udelay(1000);
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writel((readl(VOVRCLK) & ~VOVRCLK_EN), VOVRCLK);
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udelay(1000);
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break;
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case FB_BLANK_UNBLANK:
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writel((readl(DSCTRL) | DSCTRL_SYNCGEN_EN), DSCTRL);
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udelay(1000);
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writel((readl(PIXCLK) | PIXCLK_EN), PIXCLK);
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udelay(1000);
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break;
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}
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return 0;
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}
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static struct fb_ops mbxfb_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = mbxfb_check_var,
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.fb_set_par = mbxfb_set_par,
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.fb_setcolreg = mbxfb_setcolreg,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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.fb_blank = mbxfb_blank,
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};
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/*
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Enable external SDRAM controller. Assume that all clocks are active
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by now.
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*/
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static void __devinit setup_memc(struct fb_info *fbi)
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{
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struct mbxfb_info *mfbi = fbi->par;
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unsigned long tmp;
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int i;
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/* FIXME: use platfrom specific parameters */
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/* setup SDRAM controller */
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writel((LMCFG_LMC_DS | LMCFG_LMC_TS | LMCFG_LMD_TS |
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LMCFG_LMA_TS),
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LMCFG);
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udelay(1000);
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writel(LMPWR_MC_PWR_ACT, LMPWR);
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udelay(1000);
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/* setup SDRAM timings */
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writel((Lmtim_Tras(7) | Lmtim_Trp(3) | Lmtim_Trcd(3) |
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Lmtim_Trc(9) | Lmtim_Tdpl(2)),
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LMTIM);
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udelay(1000);
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/* setup SDRAM refresh rate */
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writel(0xc2b, LMREFRESH);
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udelay(1000);
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/* setup SDRAM type parameters */
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writel((LMTYPE_CASLAT_3 | LMTYPE_BKSZ_2 | LMTYPE_ROWSZ_11 |
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LMTYPE_COLSZ_8),
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LMTYPE);
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udelay(1000);
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/* enable memory controller */
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writel(LMPWR_MC_PWR_ACT, LMPWR);
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udelay(1000);
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/* perform dummy reads */
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for ( i = 0; i < 16; i++ ) {
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tmp = readl(fbi->screen_base);
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}
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}
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static void enable_clocks(struct fb_info *fbi)
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{
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/* enable clocks */
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writel(SYSCLKSRC_PLL_2, SYSCLKSRC);
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udelay(1000);
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writel(PIXCLKSRC_PLL_1, PIXCLKSRC);
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udelay(1000);
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writel(0x00000000, CLKSLEEP);
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udelay(1000);
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writel((Core_Pll_M(0x17) | Core_Pll_N(0x3) | Core_Pll_P(0x0) |
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CORE_PLL_EN),
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COREPLL);
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udelay(1000);
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writel((Disp_Pll_M(0x1b) | Disp_Pll_N(0x7) | Disp_Pll_P(0x1) |
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DISP_PLL_EN),
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DISPPLL);
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writel(0x00000000, VOVRCLK);
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udelay(1000);
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writel(PIXCLK_EN, PIXCLK);
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udelay(1000);
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writel(MEMCLK_EN, MEMCLK);
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udelay(1000);
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writel(0x00000006, M24CLK);
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udelay(1000);
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writel(0x00000006, MBXCLK);
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udelay(1000);
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writel(SDCLK_EN, SDCLK);
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udelay(1000);
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writel(0x00000001, PIXCLKDIV);
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udelay(1000);
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}
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static void __devinit setup_graphics(struct fb_info *fbi)
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{
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unsigned long gsctrl;
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gsctrl = GSCTRL_GAMMA_EN | Gsctrl_Width(fbi->var.xres) |
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Gsctrl_Height(fbi->var.yres);
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switch (fbi->var.bits_per_pixel) {
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case 16:
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if (fbi->var.green.length == 5)
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gsctrl |= GSCTRL_GPIXFMT_ARGB1555;
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else
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gsctrl |= GSCTRL_GPIXFMT_RGB565;
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break;
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case 24:
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gsctrl |= GSCTRL_GPIXFMT_RGB888;
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break;
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case 32:
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gsctrl |= GSCTRL_GPIXFMT_ARGB8888;
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break;
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}
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writel(gsctrl, GSCTRL);
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udelay(1000);
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writel(0x00000000, GBBASE);
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udelay(1000);
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writel(0x00ffffff, GDRCTRL);
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udelay(1000);
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writel((GSCADR_STR_EN | Gscadr_Gbase_Adr(0x6000)), GSCADR);
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udelay(1000);
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writel(0x00000000, GPLUT);
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udelay(1000);
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}
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static void __devinit setup_display(struct fb_info *fbi)
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{
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unsigned long dsctrl = 0;
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dsctrl = DSCTRL_BLNK_POL;
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if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
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dsctrl |= DSCTRL_HS_POL;
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if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
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dsctrl |= DSCTRL_VS_POL;
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writel(dsctrl, DSCTRL);
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udelay(1000);
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writel(0xd0303010, DMCTRL);
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udelay(1000);
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writel((readl(DSCTRL) | DSCTRL_SYNCGEN_EN), DSCTRL);
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}
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static void __devinit enable_controller(struct fb_info *fbi)
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{
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writel(SYSRST_RST, SYSRST);
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udelay(1000);
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enable_clocks(fbi);
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setup_memc(fbi);
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setup_graphics(fbi);
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setup_display(fbi);
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}
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#ifdef CONFIG_PM
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/*
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* Power management hooks. Note that we won't be called from IRQ context,
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* unlike the blank functions above, so we may sleep.
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*/
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static int mbxfb_suspend(struct platform_device *dev, pm_message_t state)
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{
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/* make frame buffer memory enter self-refresh mode */
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writel(LMPWR_MC_PWR_SRM, LMPWR);
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while (LMPWRSTAT != LMPWRSTAT_MC_PWR_SRM)
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; /* empty statement */
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/* reset the device, since it's initial state is 'mostly sleeping' */
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writel(SYSRST_RST, SYSRST);
|
|
return 0;
|
|
}
|
|
|
|
static int mbxfb_resume(struct platform_device *dev)
|
|
{
|
|
struct fb_info *fbi = platform_get_drvdata(dev);
|
|
|
|
enable_clocks(fbi);
|
|
/* setup_graphics(fbi); */
|
|
/* setup_display(fbi); */
|
|
|
|
writel((readl(DSCTRL) | DSCTRL_SYNCGEN_EN), DSCTRL);
|
|
return 0;
|
|
}
|
|
#else
|
|
#define mbxfb_suspend NULL
|
|
#define mbxfb_resume NULL
|
|
#endif
|
|
|
|
/* debugfs entries */
|
|
#ifndef CONFIG_FB_MBX_DEBUG
|
|
#define mbxfb_debugfs_init(x) do {} while(0)
|
|
#define mbxfb_debugfs_remove(x) do {} while(0)
|
|
#endif
|
|
|
|
#define res_size(_r) (((_r)->end - (_r)->start) + 1)
|
|
|
|
static int __devinit mbxfb_probe(struct platform_device *dev)
|
|
{
|
|
int ret;
|
|
struct fb_info *fbi;
|
|
struct mbxfb_info *mfbi;
|
|
struct mbxfb_platform_data *pdata;
|
|
|
|
dev_dbg(dev, "mbxfb_probe\n");
|
|
|
|
fbi = framebuffer_alloc(sizeof(struct mbxfb_info), &dev->dev);
|
|
if (fbi == NULL) {
|
|
dev_err(&dev->dev, "framebuffer_alloc failed\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
mfbi = fbi->par;
|
|
fbi->pseudo_palette = mfbi->pseudo_palette;
|
|
pdata = dev->dev.platform_data;
|
|
if (pdata->probe)
|
|
mfbi->platform_probe = pdata->probe;
|
|
if (pdata->remove)
|
|
mfbi->platform_remove = pdata->remove;
|
|
|
|
mfbi->fb_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
mfbi->reg_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
|
|
|
|
if (!mfbi->fb_res || !mfbi->reg_res) {
|
|
dev_err(&dev->dev, "no resources found\n");
|
|
ret = -ENODEV;
|
|
goto err1;
|
|
}
|
|
|
|
mfbi->fb_req = request_mem_region(mfbi->fb_res->start,
|
|
res_size(mfbi->fb_res), dev->name);
|
|
if (mfbi->fb_req == NULL) {
|
|
dev_err(&dev->dev, "failed to claim framebuffer memory\n");
|
|
ret = -EINVAL;
|
|
goto err1;
|
|
}
|
|
mfbi->fb_phys_addr = mfbi->fb_res->start;
|
|
|
|
mfbi->reg_req = request_mem_region(mfbi->reg_res->start,
|
|
res_size(mfbi->reg_res), dev->name);
|
|
if (mfbi->reg_req == NULL) {
|
|
dev_err(&dev->dev, "failed to claim Marathon registers\n");
|
|
ret = -EINVAL;
|
|
goto err2;
|
|
}
|
|
mfbi->reg_phys_addr = mfbi->reg_res->start;
|
|
|
|
mfbi->reg_virt_addr = ioremap_nocache(mfbi->reg_phys_addr,
|
|
res_size(mfbi->reg_req));
|
|
if (!mfbi->reg_virt_addr) {
|
|
dev_err(&dev->dev, "failed to ioremap Marathon registers\n");
|
|
ret = -EINVAL;
|
|
goto err3;
|
|
}
|
|
virt_base_2700 = (unsigned long)mfbi->reg_virt_addr;
|
|
|
|
mfbi->fb_virt_addr = ioremap_nocache(mfbi->fb_phys_addr,
|
|
res_size(mfbi->fb_req));
|
|
if (!mfbi->reg_virt_addr) {
|
|
dev_err(&dev->dev, "failed to ioremap frame buffer\n");
|
|
ret = -EINVAL;
|
|
goto err4;
|
|
}
|
|
|
|
/* FIXME: get from platform */
|
|
fbi->screen_base = (char __iomem *)(mfbi->fb_virt_addr + 0x60000);
|
|
fbi->screen_size = 8 * 1024 * 1024; /* 8 Megs */
|
|
fbi->fbops = &mbxfb_ops;
|
|
|
|
fbi->var = mbxfb_default;
|
|
fbi->fix = mbxfb_fix;
|
|
fbi->fix.smem_start = mfbi->fb_phys_addr + 0x60000;
|
|
fbi->fix.smem_len = 8 * 1024 * 1024;
|
|
fbi->fix.line_length = 640 * 2;
|
|
|
|
ret = fb_alloc_cmap(&fbi->cmap, 256, 0);
|
|
if (ret < 0) {
|
|
dev_err(&dev->dev, "fb_alloc_cmap failed\n");
|
|
ret = -EINVAL;
|
|
goto err5;
|
|
}
|
|
|
|
platform_set_drvdata(dev, fbi);
|
|
|
|
printk(KERN_INFO "fb%d: mbx frame buffer device\n", fbi->node);
|
|
|
|
if (mfbi->platform_probe)
|
|
mfbi->platform_probe(fbi);
|
|
|
|
enable_controller(fbi);
|
|
|
|
mbxfb_debugfs_init(fbi);
|
|
|
|
ret = register_framebuffer(fbi);
|
|
if (ret < 0) {
|
|
dev_err(&dev->dev, "register_framebuffer failed\n");
|
|
ret = -EINVAL;
|
|
goto err6;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err6:
|
|
fb_dealloc_cmap(&fbi->cmap);
|
|
err5:
|
|
iounmap(mfbi->fb_virt_addr);
|
|
err4:
|
|
iounmap(mfbi->reg_virt_addr);
|
|
err3:
|
|
release_mem_region(mfbi->reg_res->start, res_size(mfbi->reg_res));
|
|
err2:
|
|
release_mem_region(mfbi->fb_res->start, res_size(mfbi->fb_res));
|
|
err1:
|
|
framebuffer_release(fbi);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __devexit mbxfb_remove(struct platform_device *dev)
|
|
{
|
|
struct fb_info *fbi = platform_get_drvdata(dev);
|
|
|
|
writel(SYSRST_RST, SYSRST);
|
|
udelay(1000);
|
|
|
|
mbxfb_debugfs_remove(fbi);
|
|
|
|
if (fbi) {
|
|
struct mbxfb_info *mfbi = fbi->par;
|
|
|
|
unregister_framebuffer(fbi);
|
|
if (mfbi) {
|
|
if (mfbi->platform_remove)
|
|
mfbi->platform_remove(fbi);
|
|
|
|
if (mfbi->fb_virt_addr)
|
|
iounmap(mfbi->fb_virt_addr);
|
|
if (mfbi->reg_virt_addr)
|
|
iounmap(mfbi->reg_virt_addr);
|
|
if (mfbi->reg_req)
|
|
release_mem_region(mfbi->reg_req->start,
|
|
res_size(mfbi->reg_req));
|
|
if (mfbi->fb_req)
|
|
release_mem_region(mfbi->fb_req->start,
|
|
res_size(mfbi->fb_req));
|
|
}
|
|
framebuffer_release(fbi);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver mbxfb_driver = {
|
|
.probe = mbxfb_probe,
|
|
.remove = mbxfb_remove,
|
|
.suspend = mbxfb_suspend,
|
|
.resume = mbxfb_resume,
|
|
.driver = {
|
|
.name = "mbx-fb",
|
|
},
|
|
};
|
|
|
|
int __devinit mbxfb_init(void)
|
|
{
|
|
return platform_driver_register(&mbxfb_driver);
|
|
}
|
|
|
|
static void __devexit mbxfb_exit(void)
|
|
{
|
|
platform_driver_unregister(&mbxfb_driver);
|
|
}
|
|
|
|
module_init(mbxfb_init);
|
|
module_exit(mbxfb_exit);
|
|
|
|
MODULE_DESCRIPTION("loadable framebuffer driver for Marathon device");
|
|
MODULE_AUTHOR("Mike Rapoport, Compulab");
|
|
MODULE_LICENSE("GPL");
|