![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
413 lines
10 KiB
C
413 lines
10 KiB
C
/*
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* Copyright (C) 2004 IBM Corporation
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*
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* Authors:
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* Leendert van Doorn <leendert@watson.ibm.com>
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* Dave Safford <safford@watson.ibm.com>
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* Reiner Sailer <sailer@watson.ibm.com>
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* Kylene Hall <kjhall@us.ibm.com>
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*
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* Maintained by: <tpmdd-devel@lists.sourceforge.net>
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*
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* Device driver for TCG/TCPA TPM (trusted platform module).
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* Specifications at www.trustedcomputinggroup.org
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation, version 2 of the
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* License.
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "tpm.h"
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/* National definitions */
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enum tpm_nsc_addr{
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TPM_NSC_IRQ = 0x07,
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TPM_NSC_BASE0_HI = 0x60,
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TPM_NSC_BASE0_LO = 0x61,
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TPM_NSC_BASE1_HI = 0x62,
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TPM_NSC_BASE1_LO = 0x63
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};
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enum tpm_nsc_index {
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NSC_LDN_INDEX = 0x07,
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NSC_SID_INDEX = 0x20,
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NSC_LDC_INDEX = 0x30,
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NSC_DIO_INDEX = 0x60,
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NSC_CIO_INDEX = 0x62,
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NSC_IRQ_INDEX = 0x70,
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NSC_ITS_INDEX = 0x71
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};
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enum tpm_nsc_status_loc {
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NSC_STATUS = 0x01,
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NSC_COMMAND = 0x01,
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NSC_DATA = 0x00
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};
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/* status bits */
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enum tpm_nsc_status {
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NSC_STATUS_OBF = 0x01, /* output buffer full */
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NSC_STATUS_IBF = 0x02, /* input buffer full */
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NSC_STATUS_F0 = 0x04, /* F0 */
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NSC_STATUS_A2 = 0x08, /* A2 */
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NSC_STATUS_RDY = 0x10, /* ready to receive command */
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NSC_STATUS_IBR = 0x20 /* ready to receive data */
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};
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/* command bits */
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enum tpm_nsc_cmd_mode {
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NSC_COMMAND_NORMAL = 0x01, /* normal mode */
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NSC_COMMAND_EOC = 0x03,
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NSC_COMMAND_CANCEL = 0x22
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};
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/*
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* Wait for a certain status to appear
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*/
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static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data)
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{
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unsigned long stop;
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/* status immediately available check */
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*data = inb(chip->vendor.base + NSC_STATUS);
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if ((*data & mask) == val)
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return 0;
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/* wait for status */
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stop = jiffies + 10 * HZ;
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do {
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msleep(TPM_TIMEOUT);
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*data = inb(chip->vendor.base + 1);
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if ((*data & mask) == val)
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return 0;
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}
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while (time_before(jiffies, stop));
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return -EBUSY;
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}
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static int nsc_wait_for_ready(struct tpm_chip *chip)
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{
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int status;
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unsigned long stop;
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/* status immediately available check */
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status = inb(chip->vendor.base + NSC_STATUS);
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if (status & NSC_STATUS_OBF)
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status = inb(chip->vendor.base + NSC_DATA);
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if (status & NSC_STATUS_RDY)
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return 0;
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/* wait for status */
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stop = jiffies + 100;
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do {
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msleep(TPM_TIMEOUT);
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status = inb(chip->vendor.base + NSC_STATUS);
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if (status & NSC_STATUS_OBF)
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status = inb(chip->vendor.base + NSC_DATA);
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if (status & NSC_STATUS_RDY)
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return 0;
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}
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while (time_before(jiffies, stop));
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dev_info(chip->dev, "wait for ready failed\n");
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return -EBUSY;
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}
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static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count)
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{
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u8 *buffer = buf;
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u8 data, *p;
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u32 size;
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__be32 *native_size;
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if (count < 6)
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return -EIO;
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if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
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dev_err(chip->dev, "F0 timeout\n");
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return -EIO;
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}
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if ((data =
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inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_NORMAL) {
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dev_err(chip->dev, "not in normal mode (0x%x)\n",
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data);
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return -EIO;
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}
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/* read the whole packet */
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for (p = buffer; p < &buffer[count]; p++) {
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if (wait_for_stat
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(chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
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dev_err(chip->dev,
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"OBF timeout (while reading data)\n");
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return -EIO;
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}
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if (data & NSC_STATUS_F0)
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break;
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*p = inb(chip->vendor.base + NSC_DATA);
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}
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if ((data & NSC_STATUS_F0) == 0 &&
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(wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
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dev_err(chip->dev, "F0 not set\n");
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return -EIO;
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}
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if ((data = inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_EOC) {
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dev_err(chip->dev,
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"expected end of command(0x%x)\n", data);
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return -EIO;
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}
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native_size = (__force __be32 *) (buf + 2);
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size = be32_to_cpu(*native_size);
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if (count < size)
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return -EIO;
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return size;
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}
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static int tpm_nsc_send(struct tpm_chip *chip, u8 * buf, size_t count)
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{
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u8 data;
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int i;
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/*
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* If we hit the chip with back to back commands it locks up
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* and never set IBF. Hitting it with this "hammer" seems to
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* fix it. Not sure why this is needed, we followed the flow
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* chart in the manual to the letter.
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*/
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outb(NSC_COMMAND_CANCEL, chip->vendor.base + NSC_COMMAND);
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if (nsc_wait_for_ready(chip) != 0)
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return -EIO;
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if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
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dev_err(chip->dev, "IBF timeout\n");
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return -EIO;
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}
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outb(NSC_COMMAND_NORMAL, chip->vendor.base + NSC_COMMAND);
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if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
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dev_err(chip->dev, "IBR timeout\n");
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return -EIO;
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}
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for (i = 0; i < count; i++) {
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if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
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dev_err(chip->dev,
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"IBF timeout (while writing data)\n");
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return -EIO;
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}
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outb(buf[i], chip->vendor.base + NSC_DATA);
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}
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if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
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dev_err(chip->dev, "IBF timeout\n");
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return -EIO;
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}
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outb(NSC_COMMAND_EOC, chip->vendor.base + NSC_COMMAND);
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return count;
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}
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static void tpm_nsc_cancel(struct tpm_chip *chip)
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{
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outb(NSC_COMMAND_CANCEL, chip->vendor.base + NSC_COMMAND);
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}
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static u8 tpm_nsc_status(struct tpm_chip *chip)
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{
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return inb(chip->vendor.base + NSC_STATUS);
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}
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static const struct file_operations nsc_ops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.open = tpm_open,
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.read = tpm_read,
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.write = tpm_write,
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.release = tpm_release,
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};
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static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
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static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
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static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps, NULL);
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static DEVICE_ATTR(cancel, S_IWUSR|S_IWGRP, NULL, tpm_store_cancel);
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static struct attribute * nsc_attrs[] = {
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&dev_attr_pubek.attr,
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&dev_attr_pcrs.attr,
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&dev_attr_caps.attr,
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&dev_attr_cancel.attr,
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NULL,
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};
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static struct attribute_group nsc_attr_grp = { .attrs = nsc_attrs };
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static const struct tpm_vendor_specific tpm_nsc = {
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.recv = tpm_nsc_recv,
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.send = tpm_nsc_send,
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.cancel = tpm_nsc_cancel,
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.status = tpm_nsc_status,
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.req_complete_mask = NSC_STATUS_OBF,
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.req_complete_val = NSC_STATUS_OBF,
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.req_canceled = NSC_STATUS_RDY,
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.attr_group = &nsc_attr_grp,
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.miscdev = { .fops = &nsc_ops, },
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};
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static struct platform_device *pdev = NULL;
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static void tpm_nsc_remove(struct device *dev)
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{
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struct tpm_chip *chip = dev_get_drvdata(dev);
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if ( chip ) {
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release_region(chip->vendor.base, 2);
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tpm_remove_hardware(chip->dev);
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}
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}
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static int tpm_nsc_suspend(struct platform_device *dev, pm_message_t msg)
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{
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return tpm_pm_suspend(&dev->dev, msg);
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}
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static int tpm_nsc_resume(struct platform_device *dev)
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{
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return tpm_pm_resume(&dev->dev);
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}
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static struct platform_driver nsc_drv = {
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.suspend = tpm_nsc_suspend,
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.resume = tpm_nsc_resume,
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.driver = {
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.name = "tpm_nsc",
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.owner = THIS_MODULE,
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},
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};
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static int __init init_nsc(void)
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{
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int rc = 0;
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int lo, hi, err;
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int nscAddrBase = TPM_ADDR;
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struct tpm_chip *chip;
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unsigned long base;
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/* verify that it is a National part (SID) */
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if (tpm_read_index(TPM_ADDR, NSC_SID_INDEX) != 0xEF) {
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nscAddrBase = (tpm_read_index(TPM_SUPERIO_ADDR, 0x2C)<<8)|
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(tpm_read_index(TPM_SUPERIO_ADDR, 0x2B)&0xFE);
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if (tpm_read_index(nscAddrBase, NSC_SID_INDEX) != 0xF6)
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return -ENODEV;
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}
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err = platform_driver_register(&nsc_drv);
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if (err)
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return err;
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hi = tpm_read_index(nscAddrBase, TPM_NSC_BASE0_HI);
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lo = tpm_read_index(nscAddrBase, TPM_NSC_BASE0_LO);
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base = (hi<<8) | lo;
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/* enable the DPM module */
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tpm_write_index(nscAddrBase, NSC_LDC_INDEX, 0x01);
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pdev = platform_device_alloc("tpm_nscl0", -1);
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if (!pdev) {
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rc = -ENOMEM;
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goto err_unreg_drv;
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}
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pdev->num_resources = 0;
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pdev->dev.driver = &nsc_drv.driver;
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pdev->dev.release = tpm_nsc_remove;
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if ((rc = platform_device_register(pdev)) < 0)
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goto err_free_dev;
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if (request_region(base, 2, "tpm_nsc0") == NULL ) {
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rc = -EBUSY;
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goto err_unreg_dev;
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}
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if (!(chip = tpm_register_hardware(&pdev->dev, &tpm_nsc))) {
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rc = -ENODEV;
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goto err_rel_reg;
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}
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dev_dbg(&pdev->dev, "NSC TPM detected\n");
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dev_dbg(&pdev->dev,
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"NSC LDN 0x%x, SID 0x%x, SRID 0x%x\n",
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tpm_read_index(nscAddrBase,0x07), tpm_read_index(nscAddrBase,0x20),
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tpm_read_index(nscAddrBase,0x27));
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dev_dbg(&pdev->dev,
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"NSC SIOCF1 0x%x SIOCF5 0x%x SIOCF6 0x%x SIOCF8 0x%x\n",
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tpm_read_index(nscAddrBase,0x21), tpm_read_index(nscAddrBase,0x25),
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tpm_read_index(nscAddrBase,0x26), tpm_read_index(nscAddrBase,0x28));
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dev_dbg(&pdev->dev, "NSC IO Base0 0x%x\n",
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(tpm_read_index(nscAddrBase,0x60) << 8) | tpm_read_index(nscAddrBase,0x61));
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dev_dbg(&pdev->dev, "NSC IO Base1 0x%x\n",
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(tpm_read_index(nscAddrBase,0x62) << 8) | tpm_read_index(nscAddrBase,0x63));
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dev_dbg(&pdev->dev, "NSC Interrupt number and wakeup 0x%x\n",
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tpm_read_index(nscAddrBase,0x70));
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dev_dbg(&pdev->dev, "NSC IRQ type select 0x%x\n",
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tpm_read_index(nscAddrBase,0x71));
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dev_dbg(&pdev->dev,
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"NSC DMA channel select0 0x%x, select1 0x%x\n",
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tpm_read_index(nscAddrBase,0x74), tpm_read_index(nscAddrBase,0x75));
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dev_dbg(&pdev->dev,
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"NSC Config "
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"0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
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tpm_read_index(nscAddrBase,0xF0), tpm_read_index(nscAddrBase,0xF1),
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tpm_read_index(nscAddrBase,0xF2), tpm_read_index(nscAddrBase,0xF3),
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tpm_read_index(nscAddrBase,0xF4), tpm_read_index(nscAddrBase,0xF5),
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tpm_read_index(nscAddrBase,0xF6), tpm_read_index(nscAddrBase,0xF7),
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tpm_read_index(nscAddrBase,0xF8), tpm_read_index(nscAddrBase,0xF9));
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dev_info(&pdev->dev,
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"NSC TPM revision %d\n",
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tpm_read_index(nscAddrBase, 0x27) & 0x1F);
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chip->vendor.base = base;
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return 0;
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err_rel_reg:
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release_region(base, 2);
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err_unreg_dev:
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platform_device_unregister(pdev);
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err_free_dev:
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kfree(pdev);
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err_unreg_drv:
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platform_driver_unregister(&nsc_drv);
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return rc;
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}
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static void __exit cleanup_nsc(void)
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{
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if (pdev) {
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tpm_nsc_remove(&pdev->dev);
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platform_device_unregister(pdev);
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kfree(pdev);
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pdev = NULL;
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}
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platform_driver_unregister(&nsc_drv);
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}
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module_init(init_nsc);
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module_exit(cleanup_nsc);
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MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
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MODULE_DESCRIPTION("TPM Driver");
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MODULE_VERSION("2.0");
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MODULE_LICENSE("GPL");
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