![Jes Sorensen](/assets/img/avatar_default.png)
On SN2 do not pass down the real ITC frequency, but rather patch the values to match the SN2 RTC frequency. Signed-off-by: Jes Sorensen <jes@sgi.com> Acked-by: Xiantao Zhang <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
677 lines
16 KiB
C
677 lines
16 KiB
C
/*
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* PAL/SAL call delegation
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*
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* Copyright (c) 2004 Li Susie <susie.li@intel.com>
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* Copyright (c) 2005 Yu Ke <ke.yu@intel.com>
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* Copyright (c) 2007 Xiantao Zhang <xiantao.zhang@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*/
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#include <linux/kvm_host.h>
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#include <linux/smp.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/clksupport.h>
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#include <asm/sn/shub_mmr.h>
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#include "vti.h"
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#include "misc.h"
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#include <asm/pal.h>
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#include <asm/sal.h>
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#include <asm/tlb.h>
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/*
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* Handy macros to make sure that the PAL return values start out
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* as something meaningful.
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*/
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#define INIT_PAL_STATUS_UNIMPLEMENTED(x) \
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{ \
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x.status = PAL_STATUS_UNIMPLEMENTED; \
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x.v0 = 0; \
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x.v1 = 0; \
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x.v2 = 0; \
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}
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#define INIT_PAL_STATUS_SUCCESS(x) \
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{ \
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x.status = PAL_STATUS_SUCCESS; \
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x.v0 = 0; \
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x.v1 = 0; \
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x.v2 = 0; \
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}
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static void kvm_get_pal_call_data(struct kvm_vcpu *vcpu,
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u64 *gr28, u64 *gr29, u64 *gr30, u64 *gr31) {
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struct exit_ctl_data *p;
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if (vcpu) {
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p = &vcpu->arch.exit_data;
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if (p->exit_reason == EXIT_REASON_PAL_CALL) {
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*gr28 = p->u.pal_data.gr28;
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*gr29 = p->u.pal_data.gr29;
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*gr30 = p->u.pal_data.gr30;
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*gr31 = p->u.pal_data.gr31;
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return ;
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}
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}
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printk(KERN_DEBUG"Failed to get vcpu pal data!!!\n");
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}
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static void set_pal_result(struct kvm_vcpu *vcpu,
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struct ia64_pal_retval result) {
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struct exit_ctl_data *p;
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p = kvm_get_exit_data(vcpu);
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if (p && p->exit_reason == EXIT_REASON_PAL_CALL) {
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p->u.pal_data.ret = result;
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return ;
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}
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INIT_PAL_STATUS_UNIMPLEMENTED(p->u.pal_data.ret);
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}
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static void set_sal_result(struct kvm_vcpu *vcpu,
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struct sal_ret_values result) {
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struct exit_ctl_data *p;
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p = kvm_get_exit_data(vcpu);
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if (p && p->exit_reason == EXIT_REASON_SAL_CALL) {
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p->u.sal_data.ret = result;
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return ;
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}
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printk(KERN_WARNING"Failed to set sal result!!\n");
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}
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struct cache_flush_args {
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u64 cache_type;
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u64 operation;
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u64 progress;
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long status;
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};
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cpumask_t cpu_cache_coherent_map;
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static void remote_pal_cache_flush(void *data)
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{
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struct cache_flush_args *args = data;
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long status;
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u64 progress = args->progress;
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status = ia64_pal_cache_flush(args->cache_type, args->operation,
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&progress, NULL);
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if (status != 0)
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args->status = status;
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}
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static struct ia64_pal_retval pal_cache_flush(struct kvm_vcpu *vcpu)
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{
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u64 gr28, gr29, gr30, gr31;
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struct ia64_pal_retval result = {0, 0, 0, 0};
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struct cache_flush_args args = {0, 0, 0, 0};
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long psr;
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gr28 = gr29 = gr30 = gr31 = 0;
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kvm_get_pal_call_data(vcpu, &gr28, &gr29, &gr30, &gr31);
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if (gr31 != 0)
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printk(KERN_ERR"vcpu:%p called cache_flush error!\n", vcpu);
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/* Always call Host Pal in int=1 */
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gr30 &= ~PAL_CACHE_FLUSH_CHK_INTRS;
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args.cache_type = gr29;
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args.operation = gr30;
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smp_call_function(remote_pal_cache_flush,
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(void *)&args, 1);
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if (args.status != 0)
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printk(KERN_ERR"pal_cache_flush error!,"
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"status:0x%lx\n", args.status);
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/*
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* Call Host PAL cache flush
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* Clear psr.ic when call PAL_CACHE_FLUSH
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*/
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local_irq_save(psr);
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result.status = ia64_pal_cache_flush(gr29, gr30, &result.v1,
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&result.v0);
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local_irq_restore(psr);
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if (result.status != 0)
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printk(KERN_ERR"vcpu:%p crashed due to cache_flush err:%ld"
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"in1:%lx,in2:%lx\n",
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vcpu, result.status, gr29, gr30);
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#if 0
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if (gr29 == PAL_CACHE_TYPE_COHERENT) {
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cpus_setall(vcpu->arch.cache_coherent_map);
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cpu_clear(vcpu->cpu, vcpu->arch.cache_coherent_map);
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cpus_setall(cpu_cache_coherent_map);
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cpu_clear(vcpu->cpu, cpu_cache_coherent_map);
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}
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#endif
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return result;
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}
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struct ia64_pal_retval pal_cache_summary(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result;
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PAL_CALL(result, PAL_CACHE_SUMMARY, 0, 0, 0);
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return result;
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}
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static struct ia64_pal_retval pal_freq_base(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result;
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PAL_CALL(result, PAL_FREQ_BASE, 0, 0, 0);
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/*
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* PAL_FREQ_BASE may not be implemented in some platforms,
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* call SAL instead.
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*/
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if (result.v0 == 0) {
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result.status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
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&result.v0,
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&result.v1);
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result.v2 = 0;
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}
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return result;
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}
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/*
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* On the SGI SN2, the ITC isn't stable. Emulation backed by the SN2
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* RTC is used instead. This function patches the ratios from SAL
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* to match the RTC before providing them to the guest.
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*/
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static void sn2_patch_itc_freq_ratios(struct ia64_pal_retval *result)
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{
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struct pal_freq_ratio *ratio;
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unsigned long sal_freq, sal_drift, factor;
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result->status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
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&sal_freq, &sal_drift);
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ratio = (struct pal_freq_ratio *)&result->v2;
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factor = ((sal_freq * 3) + (sn_rtc_cycles_per_second / 2)) /
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sn_rtc_cycles_per_second;
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ratio->num = 3;
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ratio->den = factor;
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}
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static struct ia64_pal_retval pal_freq_ratios(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result;
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PAL_CALL(result, PAL_FREQ_RATIOS, 0, 0, 0);
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if (vcpu->kvm->arch.is_sn2)
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sn2_patch_itc_freq_ratios(&result);
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return result;
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}
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static struct ia64_pal_retval pal_logical_to_physica(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result;
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INIT_PAL_STATUS_UNIMPLEMENTED(result);
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return result;
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}
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static struct ia64_pal_retval pal_platform_addr(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result;
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INIT_PAL_STATUS_SUCCESS(result);
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return result;
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}
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static struct ia64_pal_retval pal_proc_get_features(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result = {0, 0, 0, 0};
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long in0, in1, in2, in3;
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kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
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result.status = ia64_pal_proc_get_features(&result.v0, &result.v1,
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&result.v2, in2);
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return result;
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}
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static struct ia64_pal_retval pal_register_info(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result = {0, 0, 0, 0};
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long in0, in1, in2, in3;
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kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
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result.status = ia64_pal_register_info(in1, &result.v1, &result.v2);
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return result;
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}
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static struct ia64_pal_retval pal_cache_info(struct kvm_vcpu *vcpu)
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{
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pal_cache_config_info_t ci;
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long status;
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unsigned long in0, in1, in2, in3, r9, r10;
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kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
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status = ia64_pal_cache_config_info(in1, in2, &ci);
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r9 = ci.pcci_info_1.pcci1_data;
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r10 = ci.pcci_info_2.pcci2_data;
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return ((struct ia64_pal_retval){status, r9, r10, 0});
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}
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#define GUEST_IMPL_VA_MSB 59
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#define GUEST_RID_BITS 18
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static struct ia64_pal_retval pal_vm_summary(struct kvm_vcpu *vcpu)
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{
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pal_vm_info_1_u_t vminfo1;
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pal_vm_info_2_u_t vminfo2;
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struct ia64_pal_retval result;
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PAL_CALL(result, PAL_VM_SUMMARY, 0, 0, 0);
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if (!result.status) {
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vminfo1.pvi1_val = result.v0;
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vminfo1.pal_vm_info_1_s.max_itr_entry = 8;
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vminfo1.pal_vm_info_1_s.max_dtr_entry = 8;
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result.v0 = vminfo1.pvi1_val;
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vminfo2.pal_vm_info_2_s.impl_va_msb = GUEST_IMPL_VA_MSB;
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vminfo2.pal_vm_info_2_s.rid_size = GUEST_RID_BITS;
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result.v1 = vminfo2.pvi2_val;
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}
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return result;
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}
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static struct ia64_pal_retval pal_vm_info(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result;
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unsigned long in0, in1, in2, in3;
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kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
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result.status = ia64_pal_vm_info(in1, in2,
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(pal_tc_info_u_t *)&result.v1, &result.v2);
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return result;
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}
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static u64 kvm_get_pal_call_index(struct kvm_vcpu *vcpu)
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{
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u64 index = 0;
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struct exit_ctl_data *p;
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p = kvm_get_exit_data(vcpu);
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if (p && (p->exit_reason == EXIT_REASON_PAL_CALL))
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index = p->u.pal_data.gr28;
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return index;
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}
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static void prepare_for_halt(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.timer_pending = 1;
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vcpu->arch.timer_fired = 0;
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}
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static struct ia64_pal_retval pal_perf_mon_info(struct kvm_vcpu *vcpu)
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{
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long status;
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unsigned long in0, in1, in2, in3, r9;
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unsigned long pm_buffer[16];
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kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
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status = ia64_pal_perf_mon_info(pm_buffer,
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(pal_perf_mon_info_u_t *) &r9);
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if (status != 0) {
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printk(KERN_DEBUG"PAL_PERF_MON_INFO fails ret=%ld\n", status);
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} else {
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if (in1)
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memcpy((void *)in1, pm_buffer, sizeof(pm_buffer));
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else {
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status = PAL_STATUS_EINVAL;
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printk(KERN_WARNING"Invalid parameters "
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"for PAL call:0x%lx!\n", in0);
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}
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}
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return (struct ia64_pal_retval){status, r9, 0, 0};
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}
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static struct ia64_pal_retval pal_halt_info(struct kvm_vcpu *vcpu)
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{
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unsigned long in0, in1, in2, in3;
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long status;
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unsigned long res = 1000UL | (1000UL << 16) | (10UL << 32)
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| (1UL << 61) | (1UL << 60);
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kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
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if (in1) {
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memcpy((void *)in1, &res, sizeof(res));
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status = 0;
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} else{
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status = PAL_STATUS_EINVAL;
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printk(KERN_WARNING"Invalid parameters "
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"for PAL call:0x%lx!\n", in0);
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}
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return (struct ia64_pal_retval){status, 0, 0, 0};
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}
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static struct ia64_pal_retval pal_mem_attrib(struct kvm_vcpu *vcpu)
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{
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unsigned long r9;
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long status;
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status = ia64_pal_mem_attrib(&r9);
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return (struct ia64_pal_retval){status, r9, 0, 0};
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}
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static void remote_pal_prefetch_visibility(void *v)
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{
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s64 trans_type = (s64)v;
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ia64_pal_prefetch_visibility(trans_type);
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}
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static struct ia64_pal_retval pal_prefetch_visibility(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result = {0, 0, 0, 0};
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unsigned long in0, in1, in2, in3;
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kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
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result.status = ia64_pal_prefetch_visibility(in1);
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if (result.status == 0) {
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/* Must be performed on all remote processors
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in the coherence domain. */
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smp_call_function(remote_pal_prefetch_visibility,
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(void *)in1, 1);
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/* Unnecessary on remote processor for other vcpus!*/
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result.status = 1;
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}
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return result;
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}
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static void remote_pal_mc_drain(void *v)
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{
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ia64_pal_mc_drain();
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}
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static struct ia64_pal_retval pal_get_brand_info(struct kvm_vcpu *vcpu)
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{
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struct ia64_pal_retval result = {0, 0, 0, 0};
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unsigned long in0, in1, in2, in3;
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kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
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if (in1 == 0 && in2) {
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char brand_info[128];
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result.status = ia64_pal_get_brand_info(brand_info);
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if (result.status == PAL_STATUS_SUCCESS)
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memcpy((void *)in2, brand_info, 128);
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} else {
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result.status = PAL_STATUS_REQUIRES_MEMORY;
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printk(KERN_WARNING"Invalid parameters for "
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"PAL call:0x%lx!\n", in0);
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}
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return result;
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}
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int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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u64 gr28;
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struct ia64_pal_retval result;
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int ret = 1;
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gr28 = kvm_get_pal_call_index(vcpu);
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switch (gr28) {
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case PAL_CACHE_FLUSH:
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result = pal_cache_flush(vcpu);
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break;
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case PAL_MEM_ATTRIB:
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result = pal_mem_attrib(vcpu);
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break;
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case PAL_CACHE_SUMMARY:
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result = pal_cache_summary(vcpu);
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break;
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case PAL_PERF_MON_INFO:
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result = pal_perf_mon_info(vcpu);
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break;
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case PAL_HALT_INFO:
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result = pal_halt_info(vcpu);
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break;
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case PAL_HALT_LIGHT:
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{
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INIT_PAL_STATUS_SUCCESS(result);
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prepare_for_halt(vcpu);
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if (kvm_highest_pending_irq(vcpu) == -1)
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ret = kvm_emulate_halt(vcpu);
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}
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break;
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case PAL_PREFETCH_VISIBILITY:
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result = pal_prefetch_visibility(vcpu);
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break;
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case PAL_MC_DRAIN:
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result.status = ia64_pal_mc_drain();
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/* FIXME: All vcpus likely call PAL_MC_DRAIN.
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That causes the congestion. */
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smp_call_function(remote_pal_mc_drain, NULL, 1);
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break;
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case PAL_FREQ_RATIOS:
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result = pal_freq_ratios(vcpu);
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break;
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case PAL_FREQ_BASE:
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result = pal_freq_base(vcpu);
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break;
|
|
|
|
case PAL_LOGICAL_TO_PHYSICAL :
|
|
result = pal_logical_to_physica(vcpu);
|
|
break;
|
|
|
|
case PAL_VM_SUMMARY :
|
|
result = pal_vm_summary(vcpu);
|
|
break;
|
|
|
|
case PAL_VM_INFO :
|
|
result = pal_vm_info(vcpu);
|
|
break;
|
|
case PAL_PLATFORM_ADDR :
|
|
result = pal_platform_addr(vcpu);
|
|
break;
|
|
case PAL_CACHE_INFO:
|
|
result = pal_cache_info(vcpu);
|
|
break;
|
|
case PAL_PTCE_INFO:
|
|
INIT_PAL_STATUS_SUCCESS(result);
|
|
result.v1 = (1L << 32) | 1L;
|
|
break;
|
|
case PAL_REGISTER_INFO:
|
|
result = pal_register_info(vcpu);
|
|
break;
|
|
case PAL_VM_PAGE_SIZE:
|
|
result.status = ia64_pal_vm_page_size(&result.v0,
|
|
&result.v1);
|
|
break;
|
|
case PAL_RSE_INFO:
|
|
result.status = ia64_pal_rse_info(&result.v0,
|
|
(pal_hints_u_t *)&result.v1);
|
|
break;
|
|
case PAL_PROC_GET_FEATURES:
|
|
result = pal_proc_get_features(vcpu);
|
|
break;
|
|
case PAL_DEBUG_INFO:
|
|
result.status = ia64_pal_debug_info(&result.v0,
|
|
&result.v1);
|
|
break;
|
|
case PAL_VERSION:
|
|
result.status = ia64_pal_version(
|
|
(pal_version_u_t *)&result.v0,
|
|
(pal_version_u_t *)&result.v1);
|
|
break;
|
|
case PAL_FIXED_ADDR:
|
|
result.status = PAL_STATUS_SUCCESS;
|
|
result.v0 = vcpu->vcpu_id;
|
|
break;
|
|
case PAL_BRAND_INFO:
|
|
result = pal_get_brand_info(vcpu);
|
|
break;
|
|
case PAL_GET_PSTATE:
|
|
case PAL_CACHE_SHARED_INFO:
|
|
INIT_PAL_STATUS_UNIMPLEMENTED(result);
|
|
break;
|
|
default:
|
|
INIT_PAL_STATUS_UNIMPLEMENTED(result);
|
|
printk(KERN_WARNING"kvm: Unsupported pal call,"
|
|
" index:0x%lx\n", gr28);
|
|
}
|
|
set_pal_result(vcpu, result);
|
|
return ret;
|
|
}
|
|
|
|
static struct sal_ret_values sal_emulator(struct kvm *kvm,
|
|
long index, unsigned long in1,
|
|
unsigned long in2, unsigned long in3,
|
|
unsigned long in4, unsigned long in5,
|
|
unsigned long in6, unsigned long in7)
|
|
{
|
|
unsigned long r9 = 0;
|
|
unsigned long r10 = 0;
|
|
long r11 = 0;
|
|
long status;
|
|
|
|
status = 0;
|
|
switch (index) {
|
|
case SAL_FREQ_BASE:
|
|
status = ia64_sal_freq_base(in1, &r9, &r10);
|
|
break;
|
|
case SAL_PCI_CONFIG_READ:
|
|
printk(KERN_WARNING"kvm: Not allowed to call here!"
|
|
" SAL_PCI_CONFIG_READ\n");
|
|
break;
|
|
case SAL_PCI_CONFIG_WRITE:
|
|
printk(KERN_WARNING"kvm: Not allowed to call here!"
|
|
" SAL_PCI_CONFIG_WRITE\n");
|
|
break;
|
|
case SAL_SET_VECTORS:
|
|
if (in1 == SAL_VECTOR_OS_BOOT_RENDEZ) {
|
|
if (in4 != 0 || in5 != 0 || in6 != 0 || in7 != 0) {
|
|
status = -2;
|
|
} else {
|
|
kvm->arch.rdv_sal_data.boot_ip = in2;
|
|
kvm->arch.rdv_sal_data.boot_gp = in3;
|
|
}
|
|
printk("Rendvous called! iip:%lx\n\n", in2);
|
|
} else
|
|
printk(KERN_WARNING"kvm: CALLED SAL_SET_VECTORS %lu."
|
|
"ignored...\n", in1);
|
|
break;
|
|
case SAL_GET_STATE_INFO:
|
|
/* No more info. */
|
|
status = -5;
|
|
r9 = 0;
|
|
break;
|
|
case SAL_GET_STATE_INFO_SIZE:
|
|
/* Return a dummy size. */
|
|
status = 0;
|
|
r9 = 128;
|
|
break;
|
|
case SAL_CLEAR_STATE_INFO:
|
|
/* Noop. */
|
|
break;
|
|
case SAL_MC_RENDEZ:
|
|
printk(KERN_WARNING
|
|
"kvm: called SAL_MC_RENDEZ. ignored...\n");
|
|
break;
|
|
case SAL_MC_SET_PARAMS:
|
|
printk(KERN_WARNING
|
|
"kvm: called SAL_MC_SET_PARAMS.ignored!\n");
|
|
break;
|
|
case SAL_CACHE_FLUSH:
|
|
if (1) {
|
|
/*Flush using SAL.
|
|
This method is faster but has a side
|
|
effect on other vcpu running on
|
|
this cpu. */
|
|
status = ia64_sal_cache_flush(in1);
|
|
} else {
|
|
/*Maybe need to implement the method
|
|
without side effect!*/
|
|
status = 0;
|
|
}
|
|
break;
|
|
case SAL_CACHE_INIT:
|
|
printk(KERN_WARNING
|
|
"kvm: called SAL_CACHE_INIT. ignored...\n");
|
|
break;
|
|
case SAL_UPDATE_PAL:
|
|
printk(KERN_WARNING
|
|
"kvm: CALLED SAL_UPDATE_PAL. ignored...\n");
|
|
break;
|
|
default:
|
|
printk(KERN_WARNING"kvm: called SAL_CALL with unknown index."
|
|
" index:%ld\n", index);
|
|
status = -1;
|
|
break;
|
|
}
|
|
return ((struct sal_ret_values) {status, r9, r10, r11});
|
|
}
|
|
|
|
static void kvm_get_sal_call_data(struct kvm_vcpu *vcpu, u64 *in0, u64 *in1,
|
|
u64 *in2, u64 *in3, u64 *in4, u64 *in5, u64 *in6, u64 *in7){
|
|
|
|
struct exit_ctl_data *p;
|
|
|
|
p = kvm_get_exit_data(vcpu);
|
|
|
|
if (p) {
|
|
if (p->exit_reason == EXIT_REASON_SAL_CALL) {
|
|
*in0 = p->u.sal_data.in0;
|
|
*in1 = p->u.sal_data.in1;
|
|
*in2 = p->u.sal_data.in2;
|
|
*in3 = p->u.sal_data.in3;
|
|
*in4 = p->u.sal_data.in4;
|
|
*in5 = p->u.sal_data.in5;
|
|
*in6 = p->u.sal_data.in6;
|
|
*in7 = p->u.sal_data.in7;
|
|
return ;
|
|
}
|
|
}
|
|
*in0 = 0;
|
|
}
|
|
|
|
void kvm_sal_emul(struct kvm_vcpu *vcpu)
|
|
{
|
|
|
|
struct sal_ret_values result;
|
|
u64 index, in1, in2, in3, in4, in5, in6, in7;
|
|
|
|
kvm_get_sal_call_data(vcpu, &index, &in1, &in2,
|
|
&in3, &in4, &in5, &in6, &in7);
|
|
result = sal_emulator(vcpu->kvm, index, in1, in2, in3,
|
|
in4, in5, in6, in7);
|
|
set_sal_result(vcpu, result);
|
|
}
|