![Ben Dooks](/assets/img/avatar_default.png)
The <mach/dma.h> is for the driver API for the DMA system and should not have anything relying on the CPU specific registers. Remove the registers to <plat/dma-regs.h> for the code that really needs to know about them. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
199 lines
5.5 KiB
C
199 lines
5.5 KiB
C
/* linux/arch/arm/mach-s3c2412/dma.c
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*
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2412 DMA selection
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*
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <linux/io.h>
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#include <mach/dma.h>
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#include <plat/dma-plat.h>
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#include <plat/cpu.h>
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#include <plat/regs-serial.h>
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#include <mach/regs-gpio.h>
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#include <plat/regs-ac97.h>
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#include <plat/regs-dma.h>
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#include <mach/regs-mem.h>
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#include <mach/regs-lcd.h>
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#include <mach/regs-sdi.h>
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#include <plat/regs-s3c2412-iis.h>
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#include <plat/regs-iis.h>
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#include <plat/regs-spi.h>
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#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
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static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
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[DMACH_XD0] = {
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.name = "xdreq0",
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.channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
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.channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
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},
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[DMACH_XD1] = {
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.name = "xdreq1",
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.channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
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.channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
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},
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[DMACH_SDI] = {
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.name = "sdi",
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.channels = MAP(S3C2412_DMAREQSEL_SDI),
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.channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
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.hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA,
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.hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA,
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},
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[DMACH_SPI0] = {
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.name = "spi0",
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.channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
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.channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
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.hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
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.hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
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},
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[DMACH_SPI1] = {
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.name = "spi1",
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.channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
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.channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
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.hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
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.hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT,
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},
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[DMACH_UART0] = {
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.name = "uart0",
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.channels = MAP(S3C2412_DMAREQSEL_UART0_0),
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.channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
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.hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
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},
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[DMACH_UART1] = {
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.name = "uart1",
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.channels = MAP(S3C2412_DMAREQSEL_UART1_0),
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.channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
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.hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
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},
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[DMACH_UART2] = {
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.name = "uart2",
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.channels = MAP(S3C2412_DMAREQSEL_UART2_0),
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.channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
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.hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
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},
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[DMACH_UART0_SRC2] = {
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.name = "uart0",
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.channels = MAP(S3C2412_DMAREQSEL_UART0_1),
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.channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
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.hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
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},
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[DMACH_UART1_SRC2] = {
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.name = "uart1",
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.channels = MAP(S3C2412_DMAREQSEL_UART1_1),
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.channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
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.hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
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},
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[DMACH_UART2_SRC2] = {
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.name = "uart2",
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.channels = MAP(S3C2412_DMAREQSEL_UART2_1),
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.channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
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.hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
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},
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[DMACH_TIMER] = {
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.name = "timer",
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.channels = MAP(S3C2412_DMAREQSEL_TIMER),
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.channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
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},
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[DMACH_I2S_IN] = {
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.name = "i2s-sdi",
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.channels = MAP(S3C2412_DMAREQSEL_I2SRX),
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.channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
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.hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD,
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},
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[DMACH_I2S_OUT] = {
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.name = "i2s-sdo",
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.channels = MAP(S3C2412_DMAREQSEL_I2STX),
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.channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
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.hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD,
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},
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[DMACH_USB_EP1] = {
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.name = "usb-ep1",
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.channels = MAP(S3C2412_DMAREQSEL_USBEP1),
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.channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
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},
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[DMACH_USB_EP2] = {
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.name = "usb-ep2",
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.channels = MAP(S3C2412_DMAREQSEL_USBEP2),
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.channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
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},
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[DMACH_USB_EP3] = {
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.name = "usb-ep3",
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.channels = MAP(S3C2412_DMAREQSEL_USBEP3),
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.channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
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},
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[DMACH_USB_EP4] = {
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.name = "usb-ep4",
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.channels = MAP(S3C2412_DMAREQSEL_USBEP4),
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.channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
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},
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};
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static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
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struct s3c24xx_dma_map *map,
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enum s3c2410_dmasrc dir)
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{
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unsigned long chsel;
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if (dir == S3C2410_DMASRC_HW)
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chsel = map->channels_rx[0];
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else
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chsel = map->channels[0];
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chsel &= ~DMA_CH_VALID;
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chsel |= S3C2412_DMAREQSEL_HW;
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writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
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}
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static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
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struct s3c24xx_dma_map *map)
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{
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s3c2412_dma_direction(chan, map, chan->source);
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}
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static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
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.select = s3c2412_dma_select,
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.direction = s3c2412_dma_direction,
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.dcon_mask = 0,
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.map = s3c2412_dma_mappings,
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.map_size = ARRAY_SIZE(s3c2412_dma_mappings),
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};
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static int __init s3c2412_dma_add(struct sys_device *sysdev)
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{
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s3c2410_dma_init();
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return s3c24xx_dma_init_map(&s3c2412_dma_sel);
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}
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static struct sysdev_driver s3c2412_dma_driver = {
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.add = s3c2412_dma_add,
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};
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static int __init s3c2412_dma_init(void)
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{
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return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_dma_driver);
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}
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arch_initcall(s3c2412_dma_init);
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