17a722caae
Add timing data for the Qimonda HYB18M512160AF-6 SDRAM chip, used on the OMAP3430SDP boards. Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying the chip used on 3430SDP. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
55 lines
1.2 KiB
C
55 lines
1.2 KiB
C
/*
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* SDRC register values for the Qimonda HYB18M512160AF-6
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*
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* Copyright (C) 2008-2009 Texas Instruments, Inc.
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* Copyright (C) 2008-2009 Nokia Corporation
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*
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
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#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
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#include <mach/sdrc.h>
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/* Qimonda HYB18M512160AF-6 */
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static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
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[0] = {
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.rate = 166000000,
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.actim_ctrla = 0x629db4c6,
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.actim_ctrlb = 0x00012214,
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.rfr_ctrl = 0x0004dc01,
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.mr = 0x00000032,
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},
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[1] = {
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.rate = 165941176,
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.actim_ctrla = 0x629db4c6,
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.actim_ctrlb = 0x00012214,
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.rfr_ctrl = 0x0004dc01,
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.mr = 0x00000032,
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},
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[2] = {
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.rate = 83000000,
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.actim_ctrla = 0x31512283,
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.actim_ctrlb = 0x0001220a,
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.rfr_ctrl = 0x00025501,
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.mr = 0x00000022,
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},
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[3] = {
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.rate = 82970588,
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.actim_ctrla = 0x31512283,
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.actim_ctrlb = 0x0001220a,
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.rfr_ctrl = 0x00025501,
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.mr = 0x00000022,
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},
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[4] = {
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.rate = 0
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},
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};
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#endif
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