98f420b23a
Replace HW_zzz register access macros by regular __raw_readl/__raw_writel calls Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
158 lines
3.7 KiB
C
158 lines
3.7 KiB
C
/*
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* Freescale STMP37XX/STMP378X Pin Multiplexing
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*
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* Author: Vladislav Buzov <vbuzov@embeddedalley.com>
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*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef __PINMUX_H
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#define __PINMUX_H
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/gpio.h>
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#include <asm-generic/gpio.h>
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/* Pin definitions */
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#include "pins.h"
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#include <mach/pins.h>
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/*
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* Each pin may be routed up to four different HW interfaces
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* including GPIO
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*/
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enum pin_fun {
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PIN_FUN1 = 0,
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PIN_FUN2,
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PIN_FUN3,
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PIN_GPIO,
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};
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/*
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* Each pin may have different output drive strength in range from
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* 4mA to 20mA. The most common case is 4, 8 and 12 mA strengths.
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*/
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enum pin_strength {
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PIN_4MA = 0,
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PIN_8MA,
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PIN_12MA,
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PIN_16MA,
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PIN_20MA,
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};
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/*
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* Each pin can be programmed for 1.8V or 3.3V
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*/
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enum pin_voltage {
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PIN_1_8V = 0,
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PIN_3_3V,
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};
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/*
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* Structure to define a group of pins and their parameters
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*/
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struct pin_desc {
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unsigned id;
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enum pin_fun fun;
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enum pin_strength strength;
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enum pin_voltage voltage;
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unsigned pullup:1;
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};
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struct pin_group {
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struct pin_desc *pins;
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int nr_pins;
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};
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/* Set pin drive strength */
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void stmp3xxx_pin_strength(unsigned id, enum pin_strength strength,
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const char *label);
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/* Set pin voltage */
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void stmp3xxx_pin_voltage(unsigned id, enum pin_voltage voltage,
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const char *label);
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/* Enable pull-up resistor for a pin */
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void stmp3xxx_pin_pullup(unsigned id, int enable, const char *label);
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/*
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* Request a pin ownership, only one module (identified by @label)
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* may own a pin.
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*/
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int stmp3xxx_request_pin(unsigned id, enum pin_fun fun, const char *label);
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/* Release pin */
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void stmp3xxx_release_pin(unsigned id, const char *label);
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void stmp3xxx_set_pin_type(unsigned id, enum pin_fun fun);
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/*
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* Each bank is associated with a number of registers to control
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* pin function, drive strength, voltage and pull-up reigster. The
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* number of registers of a given type depends on the number of bits
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* describin particular pin.
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*/
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#define HW_MUXSEL_NUM 2 /* registers per bank */
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#define HW_MUXSEL_PIN_LEN 2 /* bits per pin */
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#define HW_MUXSEL_PIN_NUM 16 /* pins per register */
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#define HW_MUXSEL_PINFUN_MASK 0x3 /* pin function mask */
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#define HW_MUXSEL_PINFUN_NUM 4 /* four options for a pin */
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#define HW_DRIVE_NUM 4 /* registers per bank */
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#define HW_DRIVE_PIN_LEN 4 /* bits per pin */
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#define HW_DRIVE_PIN_NUM 8 /* pins per register */
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#define HW_DRIVE_PINDRV_MASK 0x3 /* pin strength mask - 2 bits */
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#define HW_DRIVE_PINDRV_NUM 5 /* five possible strength values */
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#define HW_DRIVE_PINV_MASK 0x4 /* pin voltage mask - 1 bit */
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struct stmp3xxx_pinmux_bank {
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struct gpio_chip chip;
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/* Pins allocation map */
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unsigned long pin_map;
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/* Pin owner names */
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const char *pin_labels[32];
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/* Bank registers */
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void __iomem *hw_muxsel[HW_MUXSEL_NUM];
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void __iomem *hw_drive[HW_DRIVE_NUM];
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void __iomem *hw_pull;
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void __iomem *pin2irq,
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*irqlevel,
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*irqpolarity,
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*irqen,
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*irqstat;
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/* HW MUXSEL register function bit values */
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u8 functions[HW_MUXSEL_PINFUN_NUM];
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/*
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* HW DRIVE register strength bit values:
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* 0xff - requested strength is not supported for this bank
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*/
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u8 strengths[HW_DRIVE_PINDRV_NUM];
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/* GPIO things */
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void __iomem *hw_gpio_in,
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*hw_gpio_out,
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*hw_gpio_doe;
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int irq, virq;
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};
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int __init stmp3xxx_pinmux_init(int virtual_irq_start);
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#endif /* __PINMUX_H */
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