a8ab26fe5b
This will allow hotplug CPU in the future and in general cleans up a lot of crufty code. It also should plug some races that the old hackish way introduces. Remove one old race workaround in NMI watchdog setup that is not needed anymore. I removed the old total sum of bogomips reporting code. The brag value of BogoMips has been greatly devalued in the last years on the open market. Real CPU hotplug will need some more work, but the infrastructure for it is there now. One drawback: the new TSC sync algorithm is less accurate than before. The old way of zeroing TSCs is too intrusive to do later. Instead the TSC of the BP is duplicated now, which is less accurate. akpm: - sync_tsc_bp_init seems to have the sense of `init' inverted. - SPIN_LOCK_UNLOCKED is deprecated - use DEFINE_SPINLOCK. Cc: <rusty@rustcorp.com.au> Cc: <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
135 lines
2.9 KiB
C
135 lines
2.9 KiB
C
#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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/*
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* We need the APIC definitions automatically as part of 'smp.h'
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*/
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#ifndef __ASSEMBLY__
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#include <linux/config.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/bitops.h>
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extern int disable_apic;
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#endif
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#ifdef CONFIG_X86_LOCAL_APIC
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#ifndef __ASSEMBLY__
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#include <asm/fixmap.h>
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#include <asm/mpspec.h>
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#ifdef CONFIG_X86_IO_APIC
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#include <asm/io_apic.h>
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#endif
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#include <asm/apic.h>
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#include <asm/thread_info.h>
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#endif
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#endif
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#ifdef CONFIG_SMP
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#ifndef ASSEMBLY
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#include <asm/pda.h>
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struct pt_regs;
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extern cpumask_t cpu_present_mask;
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extern cpumask_t cpu_possible_map;
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extern cpumask_t cpu_online_map;
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extern cpumask_t cpu_callout_map;
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/*
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* Private routines/data
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*/
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extern void smp_alloc_memory(void);
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extern volatile unsigned long smp_invalidate_needed;
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extern int pic_mode;
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extern int smp_num_siblings;
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extern void smp_flush_tlb(void);
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extern void smp_message_irq(int cpl, void *dev_id, struct pt_regs *regs);
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extern void smp_send_reschedule(int cpu);
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extern void smp_invalidate_rcv(void); /* Process an NMI */
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extern void zap_low_mappings(void);
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void smp_stop_cpu(void);
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extern cpumask_t cpu_sibling_map[NR_CPUS];
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extern cpumask_t cpu_core_map[NR_CPUS];
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extern u8 phys_proc_id[NR_CPUS];
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extern u8 cpu_core_id[NR_CPUS];
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#define SMP_TRAMPOLINE_BASE 0x6000
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/*
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* On x86 all CPUs are mapped 1:1 to the APIC space.
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* This simplifies scheduling and IPI sending and
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* compresses data structures.
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*/
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static inline int num_booting_cpus(void)
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{
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return cpus_weight(cpu_callout_map);
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}
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#define __smp_processor_id() read_pda(cpunumber)
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extern __inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
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}
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extern int safe_smp_processor_id(void);
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#endif /* !ASSEMBLY */
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#define NO_PROC_ID 0xFF /* No processor magic marker */
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#endif
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#ifndef ASSEMBLY
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/*
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* Some lowlevel functions might want to know about
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* the real APIC ID <-> CPU # mapping.
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*/
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extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
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extern u8 x86_cpu_to_log_apicid[NR_CPUS];
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extern u8 bios_cpu_apicid[];
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static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
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{
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return cpus_addr(cpumask)[0];
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}
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static inline int cpu_present_to_apicid(int mps_cpu)
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{
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if (mps_cpu < NR_CPUS)
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return (int)bios_cpu_apicid[mps_cpu];
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else
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return BAD_APICID;
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}
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#endif /* !ASSEMBLY */
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#ifndef CONFIG_SMP
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#define stack_smp_processor_id() 0
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#define safe_smp_processor_id() 0
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#define cpu_logical_map(x) (x)
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#else
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#include <asm/thread_info.h>
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#define stack_smp_processor_id() \
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({ \
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struct thread_info *ti; \
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__asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
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ti->cpu; \
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})
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#endif
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#ifndef __ASSEMBLY__
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static __inline int logical_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
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}
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#endif
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#endif
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