b2ef749720
This patch fixes the use of GPIO routines which are in the PCI configuration space of the RDC321x, therefore reading/writing to this space without spinlock protection can be problematic. We also now request and free GPIOs and support the MGB100 board, previous code was very AR525W-centric. Signed-off-by: Volker Weiss <volker@tintuc.de> Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ingo Molnar <mingo@elte.hu>
13 lines
332 B
C
13 lines
332 B
C
#define PFX "rdc321x: "
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/* General purpose configuration and data registers */
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#define RDC3210_CFGREG_ADDR 0x0CF8
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#define RDC3210_CFGREG_DATA 0x0CFC
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#define RDC321X_GPIO_CTRL_REG1 0x48
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#define RDC321X_GPIO_CTRL_REG2 0x84
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#define RDC321X_GPIO_DATA_REG1 0x4c
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#define RDC321X_GPIO_DATA_REG2 0x88
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#define RDC321X_MAX_GPIO 58
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