b98348bdd0
Teach AVR32 to use the "GPIO Library" when exposing its GPIOs, so that signals on external chips (like GPIO expanders) can easily be used. This mostly reorganizes some existing logic, with two minor changes in behavior: - The PSR registers are used instead of the previous "gpio_mask" values, matching AT91 behavior and removing some duplication between that role and that of "pinmux_mask". - NR_IRQs grew to acommodate a bank of external GPIOs. Eventually this number should probably become a board-specific config option. There's a debugfs dump of status for the built-in GPIOs, showing which pins have deglitching, pullups, or open drain drive enabled, as well as the ID string used when requesting each IRQ. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Jean Delvare <khali@linux-fr.org> Cc: Eric Miao <eric.miao@marvell.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
34 lines
1 KiB
C
34 lines
1 KiB
C
/*
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* Pin definitions for AT32AP7000.
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*
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* Copyright (C) 2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_AT32AP700X_H__
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#define __ASM_ARCH_AT32AP700X_H__
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#define GPIO_PERIPH_A 0
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#define GPIO_PERIPH_B 1
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/*
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* Pin numbers identifying specific GPIO pins on the chip. They can
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* also be converted to IRQ numbers by passing them through
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* gpio_to_irq().
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*/
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#define GPIO_PIOA_BASE (0)
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#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
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#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
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#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
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#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
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#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
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#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
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#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
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#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
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#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
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#endif /* __ASM_ARCH_AT32AP700X_H__ */
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