![Russell King](/assets/img/avatar_default.png)
As per the dma_unmap_* calls, we don't touch the cache when a DMA buffer transitions from device to CPU ownership. Presently, no problems have been identified with speculative cache prefetching which in itself is a new feature in later architectures. We may have to revisit the DMA API later for these architectures anyway. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
617 lines
15 KiB
C
617 lines
15 KiB
C
/*
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* linux/arch/arm/mm/dma-mapping.c
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*
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* Copyright (C) 2000-2004 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* DMA uncached mapping support.
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*/
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/list.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <asm/memory.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/sizes.h>
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/* Sanity check size */
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#if (CONSISTENT_DMA_SIZE % SZ_2M)
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#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
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#endif
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#define CONSISTENT_END (0xffe00000)
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#define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE)
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#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
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#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
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#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
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/*
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* These are the page tables (2MB each) covering uncached, DMA consistent allocations
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*/
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static pte_t *consistent_pte[NUM_CONSISTENT_PTES];
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static DEFINE_SPINLOCK(consistent_lock);
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/*
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* VM region handling support.
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*
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* This should become something generic, handling VM region allocations for
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* vmalloc and similar (ioremap, module space, etc).
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*
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* I envisage vmalloc()'s supporting vm_struct becoming:
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*
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* struct vm_struct {
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* struct vm_region region;
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* unsigned long flags;
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* struct page **pages;
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* unsigned int nr_pages;
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* unsigned long phys_addr;
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* };
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*
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* get_vm_area() would then call vm_region_alloc with an appropriate
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* struct vm_region head (eg):
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*
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* struct vm_region vmalloc_head = {
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* .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list),
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* .vm_start = VMALLOC_START,
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* .vm_end = VMALLOC_END,
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* };
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*
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* However, vmalloc_head.vm_start is variable (typically, it is dependent on
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* the amount of RAM found at boot time.) I would imagine that get_vm_area()
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* would have to initialise this each time prior to calling vm_region_alloc().
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*/
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struct vm_region {
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struct list_head vm_list;
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unsigned long vm_start;
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unsigned long vm_end;
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struct page *vm_pages;
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int vm_active;
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};
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static struct vm_region consistent_head = {
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.vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
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.vm_start = CONSISTENT_BASE,
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.vm_end = CONSISTENT_END,
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};
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static struct vm_region *
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vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp)
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{
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unsigned long addr = head->vm_start, end = head->vm_end - size;
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unsigned long flags;
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struct vm_region *c, *new;
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new = kmalloc(sizeof(struct vm_region), gfp);
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if (!new)
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goto out;
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spin_lock_irqsave(&consistent_lock, flags);
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list_for_each_entry(c, &head->vm_list, vm_list) {
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if ((addr + size) < addr)
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goto nospc;
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if ((addr + size) <= c->vm_start)
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goto found;
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addr = c->vm_end;
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if (addr > end)
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goto nospc;
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}
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found:
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/*
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* Insert this entry _before_ the one we found.
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*/
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list_add_tail(&new->vm_list, &c->vm_list);
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new->vm_start = addr;
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new->vm_end = addr + size;
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new->vm_active = 1;
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spin_unlock_irqrestore(&consistent_lock, flags);
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return new;
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nospc:
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spin_unlock_irqrestore(&consistent_lock, flags);
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kfree(new);
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out:
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return NULL;
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}
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static struct vm_region *vm_region_find(struct vm_region *head, unsigned long addr)
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{
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struct vm_region *c;
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list_for_each_entry(c, &head->vm_list, vm_list) {
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if (c->vm_active && c->vm_start == addr)
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goto out;
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}
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c = NULL;
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out:
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return c;
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}
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#ifdef CONFIG_HUGETLB_PAGE
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#error ARM Coherent DMA allocator does not (yet) support huge TLB
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#endif
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static void *
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__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
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pgprot_t prot)
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{
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struct page *page;
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struct vm_region *c;
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unsigned long order;
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u64 mask = ISA_DMA_THRESHOLD, limit;
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if (!consistent_pte[0]) {
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printk(KERN_ERR "%s: not initialised\n", __func__);
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dump_stack();
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return NULL;
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}
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if (dev) {
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mask = dev->coherent_dma_mask;
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/*
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* Sanity check the DMA mask - it must be non-zero, and
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* must be able to be satisfied by a DMA allocation.
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*/
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if (mask == 0) {
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dev_warn(dev, "coherent DMA mask is unset\n");
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goto no_page;
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}
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if ((~mask) & ISA_DMA_THRESHOLD) {
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dev_warn(dev, "coherent DMA mask %#llx is smaller "
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"than system GFP_DMA mask %#llx\n",
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mask, (unsigned long long)ISA_DMA_THRESHOLD);
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goto no_page;
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}
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}
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/*
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* Sanity check the allocation size.
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*/
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size = PAGE_ALIGN(size);
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limit = (mask + 1) & ~mask;
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if ((limit && size >= limit) ||
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size >= (CONSISTENT_END - CONSISTENT_BASE)) {
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printk(KERN_WARNING "coherent allocation too big "
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"(requested %#x mask %#llx)\n", size, mask);
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goto no_page;
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}
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order = get_order(size);
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if (mask != 0xffffffff)
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gfp |= GFP_DMA;
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page = alloc_pages(gfp, order);
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if (!page)
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goto no_page;
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/*
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* Invalidate any data that might be lurking in the
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* kernel direct-mapped region for device DMA.
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*/
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{
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void *ptr = page_address(page);
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memset(ptr, 0, size);
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dmac_flush_range(ptr, ptr + size);
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outer_flush_range(__pa(ptr), __pa(ptr) + size);
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}
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/*
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* Allocate a virtual address in the consistent mapping region.
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*/
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c = vm_region_alloc(&consistent_head, size,
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gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
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if (c) {
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pte_t *pte;
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struct page *end = page + (1 << order);
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int idx = CONSISTENT_PTE_INDEX(c->vm_start);
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u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
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pte = consistent_pte[idx] + off;
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c->vm_pages = page;
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split_page(page, order);
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/*
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* Set the "dma handle"
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*/
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*handle = page_to_dma(dev, page);
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do {
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BUG_ON(!pte_none(*pte));
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/*
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* x86 does not mark the pages reserved...
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*/
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SetPageReserved(page);
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set_pte_ext(pte, mk_pte(page, prot), 0);
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page++;
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pte++;
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off++;
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if (off >= PTRS_PER_PTE) {
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off = 0;
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pte = consistent_pte[++idx];
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}
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} while (size -= PAGE_SIZE);
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/*
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* Free the otherwise unused pages.
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*/
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while (page < end) {
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__free_page(page);
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page++;
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}
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return (void *)c->vm_start;
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}
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if (page)
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__free_pages(page, order);
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no_page:
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*handle = ~0;
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return NULL;
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}
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/*
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* Allocate DMA-coherent memory space and return both the kernel remapped
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* virtual and bus address for that space.
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*/
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void *
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dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
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{
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void *memory;
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if (dma_alloc_from_coherent(dev, size, handle, &memory))
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return memory;
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if (arch_is_coherent()) {
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void *virt;
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virt = kmalloc(size, gfp);
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if (!virt)
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return NULL;
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*handle = virt_to_dma(dev, virt);
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return virt;
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}
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return __dma_alloc(dev, size, handle, gfp,
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pgprot_noncached(pgprot_kernel));
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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/*
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* Allocate a writecombining region, in much the same way as
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* dma_alloc_coherent above.
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*/
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void *
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dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
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{
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return __dma_alloc(dev, size, handle, gfp,
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pgprot_writecombine(pgprot_kernel));
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}
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EXPORT_SYMBOL(dma_alloc_writecombine);
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static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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unsigned long flags, user_size, kern_size;
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struct vm_region *c;
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int ret = -ENXIO;
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user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
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spin_lock_irqsave(&consistent_lock, flags);
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c = vm_region_find(&consistent_head, (unsigned long)cpu_addr);
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spin_unlock_irqrestore(&consistent_lock, flags);
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if (c) {
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unsigned long off = vma->vm_pgoff;
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kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
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if (off < kern_size &&
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user_size <= (kern_size - off)) {
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ret = remap_pfn_range(vma, vma->vm_start,
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page_to_pfn(c->vm_pages) + off,
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user_size << PAGE_SHIFT,
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vma->vm_page_prot);
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}
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}
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return ret;
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}
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int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
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}
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EXPORT_SYMBOL(dma_mmap_coherent);
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int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
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}
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EXPORT_SYMBOL(dma_mmap_writecombine);
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/*
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* free a page as defined by the above mapping.
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* Must not be called with IRQs disabled.
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*/
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void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
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{
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struct vm_region *c;
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unsigned long flags, addr;
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pte_t *ptep;
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int idx;
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u32 off;
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WARN_ON(irqs_disabled());
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if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
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return;
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if (arch_is_coherent()) {
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kfree(cpu_addr);
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return;
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}
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size = PAGE_ALIGN(size);
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spin_lock_irqsave(&consistent_lock, flags);
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c = vm_region_find(&consistent_head, (unsigned long)cpu_addr);
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if (!c)
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goto no_area;
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c->vm_active = 0;
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spin_unlock_irqrestore(&consistent_lock, flags);
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if ((c->vm_end - c->vm_start) != size) {
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printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
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__func__, c->vm_end - c->vm_start, size);
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dump_stack();
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size = c->vm_end - c->vm_start;
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}
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idx = CONSISTENT_PTE_INDEX(c->vm_start);
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off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
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ptep = consistent_pte[idx] + off;
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addr = c->vm_start;
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do {
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pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
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unsigned long pfn;
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ptep++;
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addr += PAGE_SIZE;
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off++;
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if (off >= PTRS_PER_PTE) {
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off = 0;
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ptep = consistent_pte[++idx];
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}
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if (!pte_none(pte) && pte_present(pte)) {
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pfn = pte_pfn(pte);
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if (pfn_valid(pfn)) {
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struct page *page = pfn_to_page(pfn);
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/*
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* x86 does not mark the pages reserved...
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*/
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ClearPageReserved(page);
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__free_page(page);
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continue;
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}
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}
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printk(KERN_CRIT "%s: bad page in kernel page table\n",
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__func__);
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} while (size -= PAGE_SIZE);
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flush_tlb_kernel_range(c->vm_start, c->vm_end);
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spin_lock_irqsave(&consistent_lock, flags);
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list_del(&c->vm_list);
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spin_unlock_irqrestore(&consistent_lock, flags);
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kfree(c);
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return;
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no_area:
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spin_unlock_irqrestore(&consistent_lock, flags);
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printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
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__func__, cpu_addr);
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dump_stack();
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}
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EXPORT_SYMBOL(dma_free_coherent);
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/*
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* Initialise the consistent memory allocation.
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*/
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static int __init consistent_init(void)
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{
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pgd_t *pgd;
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pmd_t *pmd;
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pte_t *pte;
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int ret = 0, i = 0;
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u32 base = CONSISTENT_BASE;
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do {
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pgd = pgd_offset(&init_mm, base);
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pmd = pmd_alloc(&init_mm, pgd, base);
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if (!pmd) {
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printk(KERN_ERR "%s: no pmd tables\n", __func__);
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ret = -ENOMEM;
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break;
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}
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WARN_ON(!pmd_none(*pmd));
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pte = pte_alloc_kernel(pmd, base);
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if (!pte) {
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printk(KERN_ERR "%s: no pte tables\n", __func__);
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ret = -ENOMEM;
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break;
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}
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consistent_pte[i++] = pte;
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base += (1 << PGDIR_SHIFT);
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} while (base < CONSISTENT_END);
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return ret;
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}
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core_initcall(consistent_init);
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/*
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* Make an area consistent for devices.
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* Note: Drivers should NOT use this function directly, as it will break
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* platforms with CONFIG_DMABOUNCE.
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* Use the driver DMA support - see dma-mapping.h (dma_sync_*)
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*/
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void dma_cache_maint(const void *start, size_t size, int direction)
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{
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const void *end = start + size;
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BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(end - 1));
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switch (direction) {
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case DMA_FROM_DEVICE: /* invalidate only */
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dmac_inv_range(start, end);
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outer_inv_range(__pa(start), __pa(end));
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break;
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case DMA_TO_DEVICE: /* writeback only */
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dmac_clean_range(start, end);
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outer_clean_range(__pa(start), __pa(end));
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break;
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case DMA_BIDIRECTIONAL: /* writeback and invalidate */
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dmac_flush_range(start, end);
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outer_flush_range(__pa(start), __pa(end));
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break;
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default:
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BUG();
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}
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}
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EXPORT_SYMBOL(dma_cache_maint);
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/**
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* dma_map_sg - map a set of SG buffers for streaming mode DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Map a set of buffers described by scatterlist in streaming mode for DMA.
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* This is the scatter-gather version of the dma_map_single interface.
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* Here the scatter gather list elements are each tagged with the
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* appropriate dma address and length. They are obtained via
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* sg_dma_{address,length}.
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*
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* Device ownership issues as mentioned for dma_map_single are the same
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|
* here.
|
|
*/
|
|
int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
|
|
enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *s;
|
|
int i, j;
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
|
s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
|
|
s->length, dir);
|
|
if (dma_mapping_error(dev, s->dma_address))
|
|
goto bad_mapping;
|
|
}
|
|
return nents;
|
|
|
|
bad_mapping:
|
|
for_each_sg(sg, s, i, j)
|
|
dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(dma_map_sg);
|
|
|
|
/**
|
|
* dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
* @sg: list of buffers
|
|
* @nents: number of buffers to unmap (returned from dma_map_sg)
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
*
|
|
* Unmap a set of streaming mode DMA translations. Again, CPU access
|
|
* rules concerning calls here are the same as for dma_unmap_single().
|
|
*/
|
|
void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
|
|
enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *s;
|
|
int i;
|
|
|
|
for_each_sg(sg, s, nents, i)
|
|
dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
|
|
}
|
|
EXPORT_SYMBOL(dma_unmap_sg);
|
|
|
|
/**
|
|
* dma_sync_sg_for_cpu
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
* @sg: list of buffers
|
|
* @nents: number of buffers to map (returned from dma_map_sg)
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
*/
|
|
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
|
|
int nents, enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *s;
|
|
int i;
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
|
dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
|
|
sg_dma_len(s), dir);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
|
|
|
|
/**
|
|
* dma_sync_sg_for_device
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
* @sg: list of buffers
|
|
* @nents: number of buffers to map (returned from dma_map_sg)
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
*/
|
|
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
|
|
int nents, enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *s;
|
|
int i;
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
|
if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
|
|
sg_dma_len(s), dir))
|
|
continue;
|
|
|
|
if (!arch_is_coherent())
|
|
dma_cache_maint(sg_virt(s), s->length, dir);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(dma_sync_sg_for_device);
|