![Ronen Shitrit](/assets/img/avatar_default.png)
On newer versions of the RD88F6281 board, the WAN port is connected to its own ethernet port on the CPU, via a separate PHY, whereas on older versions of the board, it is connected to one of the PHYs in the ethernet switch. In the RD8F6281 setup code, detect which version of the board we are running on, and instantiate the ethernet ports and switch driver accordingly. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
141 lines
3.2 KiB
C
141 lines
3.2 KiB
C
/*
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* arch/arm/mach-kirkwood/rd88f6281-setup.c
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*
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* Marvell RD-88F6281 Reference Board Setup
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/nand.h>
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#include <linux/timer.h>
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#include <linux/ata_platform.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/ethtool.h>
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#include <net/dsa.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/pci.h>
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#include <mach/kirkwood.h>
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#include <plat/orion_nand.h>
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#include "common.h"
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static struct mtd_partition rd88f6281_nand_parts[] = {
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{
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.name = "u-boot",
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.offset = 0,
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.size = SZ_1M
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}, {
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.name = "uImage",
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.offset = MTDPART_OFS_NXTBLK,
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.size = SZ_2M
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}, {
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.name = "root",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL
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},
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};
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static struct resource rd88f6281_nand_resource = {
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.flags = IORESOURCE_MEM,
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.start = KIRKWOOD_NAND_MEM_PHYS_BASE,
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.end = KIRKWOOD_NAND_MEM_PHYS_BASE +
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KIRKWOOD_NAND_MEM_SIZE - 1,
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};
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static struct orion_nand_data rd88f6281_nand_data = {
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.parts = rd88f6281_nand_parts,
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.nr_parts = ARRAY_SIZE(rd88f6281_nand_parts),
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.cle = 0,
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.ale = 1,
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.width = 8,
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.chip_delay = 25,
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};
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static struct platform_device rd88f6281_nand_flash = {
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.name = "orion_nand",
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.id = -1,
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.dev = {
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.platform_data = &rd88f6281_nand_data,
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},
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.resource = &rd88f6281_nand_resource,
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.num_resources = 1,
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};
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static struct mv643xx_eth_platform_data rd88f6281_ge00_data = {
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.phy_addr = MV643XX_ETH_PHY_NONE,
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.speed = SPEED_1000,
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.duplex = DUPLEX_FULL,
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};
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static struct dsa_platform_data rd88f6281_switch_data = {
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.port_names[0] = "lan1",
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.port_names[1] = "lan2",
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.port_names[2] = "lan3",
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.port_names[3] = "lan4",
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.port_names[5] = "cpu",
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};
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static struct mv643xx_eth_platform_data rd88f6281_ge01_data = {
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.phy_addr = MV643XX_ETH_PHY_ADDR(11),
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};
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static struct mv_sata_platform_data rd88f6281_sata_data = {
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.n_ports = 2,
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};
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static void __init rd88f6281_init(void)
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{
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u32 dev, rev;
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/*
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* Basic setup. Needs to be called early.
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*/
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kirkwood_init();
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kirkwood_ehci_init();
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kirkwood_ge00_init(&rd88f6281_ge00_data);
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kirkwood_pcie_id(&dev, &rev);
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if (rev == MV88F6281_REV_A0) {
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rd88f6281_switch_data.sw_addr = 10;
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kirkwood_ge01_init(&rd88f6281_ge01_data);
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} else {
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rd88f6281_switch_data.port_names[4] = "wan";
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}
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kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ);
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kirkwood_rtc_init();
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kirkwood_sata_init(&rd88f6281_sata_data);
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kirkwood_uart0_init();
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platform_device_register(&rd88f6281_nand_flash);
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}
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static int __init rd88f6281_pci_init(void)
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{
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if (machine_is_rd88f6281())
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kirkwood_pcie_init();
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return 0;
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}
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subsys_initcall(rd88f6281_pci_init);
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MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board")
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/* Maintainer: Saeed Bishara <saeed@marvell.com> */
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.phys_io = KIRKWOOD_REGS_PHYS_BASE,
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.io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
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.boot_params = 0x00000100,
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.init_machine = rd88f6281_init,
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.map_io = kirkwood_map_io,
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.init_irq = kirkwood_init_irq,
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.timer = &kirkwood_timer,
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MACHINE_END
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