![David Brownell](/assets/img/avatar_default.png)
On the at91sam9263, IRQs for GPIO banks C and D don't currently work. This is because banks C, D, and E share one clock and toplevel IRQ, but the AT91 code setting up and handling GPIO IRQs expects no sharing. This patch: - Fixes GPIO IRQ setup and handling to cope with GPIO banks that are shared like on sam9263 chips, by setting up a list of those banks and making the IRQ dispatching logic scan that list. - Precomputes the address of each bank's registers, saving it with other per-bank data so that it no longer needs to be constantly recomputed during IRQs and other GPIO operations. That shrinks hot-path code, while helping the GPIO bank irq updates. - Fixes a minor bug where IRQ_TYPE_NONE was wrongly rejected (it just means "use the default", which is "both edges" here). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
62 lines
2.4 KiB
C
62 lines
2.4 KiB
C
/*
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* linux/arch/arm/mach-at91/generic.h
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*
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* Copyright (C) 2005 David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* Processors */
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extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
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extern void __init at91sam9260_initialize(unsigned long main_clock);
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extern void __init at91sam9261_initialize(unsigned long main_clock);
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extern void __init at91sam9263_initialize(unsigned long main_clock);
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extern void __init at91sam9rl_initialize(unsigned long main_clock);
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extern void __init at91x40_initialize(unsigned long main_clock);
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extern void __init at91cap9_initialize(unsigned long main_clock);
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/* Interrupts */
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extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
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extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
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extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
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extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
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extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
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extern void __init at91x40_init_interrupts(unsigned int priority[]);
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extern void __init at91cap9_init_interrupts(unsigned int priority[]);
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extern void __init at91_aic_init(unsigned int priority[]);
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/* Timer */
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struct sys_timer;
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extern struct sys_timer at91rm9200_timer;
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extern struct sys_timer at91sam926x_timer;
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extern struct sys_timer at91x40_timer;
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/* Clocks */
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extern int __init at91_clock_init(unsigned long main_clock);
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struct device;
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extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
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/* Power Management */
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extern void at91_irq_suspend(void);
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extern void at91_irq_resume(void);
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/* GPIO */
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#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
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#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
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struct at91_gpio_bank {
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unsigned chipbase; /* bank's first GPIO number */
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void __iomem *regbase; /* base of register bank */
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struct at91_gpio_bank *next; /* bank sharing same IRQ/clock/... */
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unsigned short id; /* peripheral ID */
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unsigned long offset; /* offset from system peripheral base */
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struct clk *clock; /* associated clock */
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};
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extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
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extern void __init at91_gpio_irq_setup(void);
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extern void (*at91_arch_reset)(void);
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extern int at91_extern_irq;
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