ea7ea65a3b
enic driver and the underlying hardware use different units for representing the interrupt coalesce timer. Driver converts the interrupt coalesce timer in usec to hardware cycles while setting the relevant hardware registers. The conversion factor can be different for each of the adapter hardware types. So it is dynamically learnt from the adapter firmware using the devcmd CMD_INTR_COAL_CONVERT. This allows the driver to configure the hardware interrupt coalesce timers in a platform independent way. Signed-off-by: Danny Guo <dannguo@cisco.com> Signed-off-by: Vasanthy Kolluri <vkolluri@cisco.com> Signed-off-by: Roopa Prabhu <roprabhu@cisco.com> Signed-off-by: David Wang <dwang2@cisco.com> Signed-off-by: David S. Miller <davem@conan.davemloft.net>
112 lines
3 KiB
C
112 lines
3 KiB
C
/*
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* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#ifndef _VNIC_INTR_H_
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#define _VNIC_INTR_H_
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#include <linux/pci.h>
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#include "vnic_dev.h"
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#define VNIC_INTR_TIMER_TYPE_ABS 0
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#define VNIC_INTR_TIMER_TYPE_QUIET 1
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/* Interrupt control */
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struct vnic_intr_ctrl {
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u32 coalescing_timer; /* 0x00 */
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u32 pad0;
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u32 coalescing_value; /* 0x08 */
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u32 pad1;
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u32 coalescing_type; /* 0x10 */
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u32 pad2;
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u32 mask_on_assertion; /* 0x18 */
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u32 pad3;
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u32 mask; /* 0x20 */
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u32 pad4;
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u32 int_credits; /* 0x28 */
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u32 pad5;
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u32 int_credit_return; /* 0x30 */
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u32 pad6;
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};
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struct vnic_intr {
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unsigned int index;
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struct vnic_dev *vdev;
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struct vnic_intr_ctrl __iomem *ctrl; /* memory-mapped */
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};
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static inline void vnic_intr_unmask(struct vnic_intr *intr)
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{
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iowrite32(0, &intr->ctrl->mask);
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}
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static inline void vnic_intr_mask(struct vnic_intr *intr)
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{
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iowrite32(1, &intr->ctrl->mask);
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}
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static inline int vnic_intr_masked(struct vnic_intr *intr)
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{
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return ioread32(&intr->ctrl->mask);
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}
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static inline void vnic_intr_return_credits(struct vnic_intr *intr,
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unsigned int credits, int unmask, int reset_timer)
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{
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#define VNIC_INTR_UNMASK_SHIFT 16
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#define VNIC_INTR_RESET_TIMER_SHIFT 17
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u32 int_credit_return = (credits & 0xffff) |
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(unmask ? (1 << VNIC_INTR_UNMASK_SHIFT) : 0) |
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(reset_timer ? (1 << VNIC_INTR_RESET_TIMER_SHIFT) : 0);
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iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
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}
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static inline unsigned int vnic_intr_credits(struct vnic_intr *intr)
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{
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return ioread32(&intr->ctrl->int_credits);
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}
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static inline void vnic_intr_return_all_credits(struct vnic_intr *intr)
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{
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unsigned int credits = vnic_intr_credits(intr);
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int unmask = 1;
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int reset_timer = 1;
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vnic_intr_return_credits(intr, credits, unmask, reset_timer);
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}
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static inline u32 vnic_intr_legacy_pba(u32 __iomem *legacy_pba)
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{
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/* read PBA without clearing */
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return ioread32(legacy_pba);
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}
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void vnic_intr_free(struct vnic_intr *intr);
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int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,
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unsigned int index);
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void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,
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unsigned int coalescing_type, unsigned int mask_on_assertion);
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void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,
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u32 coalescing_timer);
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void vnic_intr_clean(struct vnic_intr *intr);
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#endif /* _VNIC_INTR_H_ */
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