115 lines
3.5 KiB
C
115 lines
3.5 KiB
C
/*
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* Copyright (C) 2011 Ilya Yanok, Emcraft Systems
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*
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* Based on mach-omap2/board-am3517evm.c
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* Copyright (C) 2009 Texas Instruments Incorporated
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* Author: Ranjith Lohithakshan <ranjithl@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
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* whether express or implied; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/davinci_emac.h>
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#include <linux/platform_device.h>
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#include <plat/irqs.h>
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#include <mach/am35xx.h>
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#include "control.h"
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static struct mdio_platform_data am35xx_emac_mdio_pdata;
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static struct resource am35xx_emac_mdio_resources[] = {
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DEFINE_RES_MEM(AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET, SZ_4K),
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};
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static struct platform_device am35xx_emac_mdio_device = {
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.name = "davinci_mdio",
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.id = 0,
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.num_resources = ARRAY_SIZE(am35xx_emac_mdio_resources),
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.resource = am35xx_emac_mdio_resources,
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.dev.platform_data = &am35xx_emac_mdio_pdata,
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};
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static void am35xx_enable_emac_int(void)
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{
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u32 v;
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v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |
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AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);
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omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
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omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
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}
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static void am35xx_disable_emac_int(void)
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{
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u32 v;
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v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);
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omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
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omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
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}
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static struct emac_platform_data am35xx_emac_pdata = {
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.ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET,
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.ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET,
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.ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET,
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.ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE,
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.hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR,
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.version = EMAC_VERSION_2,
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.interrupt_enable = am35xx_enable_emac_int,
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.interrupt_disable = am35xx_disable_emac_int,
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};
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static struct resource am35xx_emac_resources[] = {
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DEFINE_RES_MEM(AM35XX_IPSS_EMAC_BASE, 0x30000),
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DEFINE_RES_IRQ(INT_35XX_EMAC_C0_RXTHRESH_IRQ),
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DEFINE_RES_IRQ(INT_35XX_EMAC_C0_RX_PULSE_IRQ),
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DEFINE_RES_IRQ(INT_35XX_EMAC_C0_TX_PULSE_IRQ),
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DEFINE_RES_IRQ(INT_35XX_EMAC_C0_MISC_PULSE_IRQ),
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};
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static struct platform_device am35xx_emac_device = {
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.name = "davinci_emac",
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.id = -1,
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.num_resources = ARRAY_SIZE(am35xx_emac_resources),
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.resource = am35xx_emac_resources,
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.dev = {
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.platform_data = &am35xx_emac_pdata,
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},
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};
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void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en)
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{
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u32 v;
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int err;
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am35xx_emac_pdata.rmii_en = rmii_en;
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am35xx_emac_mdio_pdata.bus_freq = mdio_bus_freq;
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err = platform_device_register(&am35xx_emac_device);
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if (err) {
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pr_err("AM35x: failed registering EMAC device: %d\n", err);
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return;
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}
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err = platform_device_register(&am35xx_emac_mdio_device);
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if (err) {
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pr_err("AM35x: failed registering EMAC MDIO device: %d\n", err);
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platform_device_unregister(&am35xx_emac_device);
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return;
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}
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v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
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v &= ~AM35XX_CPGMACSS_SW_RST;
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omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
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omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
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}
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