145 lines
5.0 KiB
C
145 lines
5.0 KiB
C
/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ISCI_PROBE_ROMS_H_
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#define _ISCI_PROBE_ROMS_H_
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#ifdef __KERNEL__
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#include <linux/firmware.h>
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#include <linux/pci.h>
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struct isci_orom *isci_request_oprom(struct pci_dev *pdev);
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union scic_oem_parameters;
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struct isci_orom;
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enum sci_status isci_parse_oem_parameters(
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union scic_oem_parameters *oem_params,
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struct isci_orom *orom,
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int scu_index);
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struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw);
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struct isci_orom *isci_get_efi_var(struct pci_dev *pdev);
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#else
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#define SCI_MAX_PORTS 4
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#define SCI_MAX_PHYS 4
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#endif
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#define ISCI_FW_NAME "isci/isci_firmware.bin"
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#define ROMSIGNATURE 0xaa55
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#define ISCI_ROM_SIG "ISCUOEMB"
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#define ISCI_ROM_SIG_SIZE 8
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#define ISCI_EFI_VENDOR_GUID NULL_GUID
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#define ISCI_EFI_ATTRIBUTES 0
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#define ISCI_EFI_VAR_NAME "isci_oemb"
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/* Allowed PORT configuration modes APC Automatic PORT configuration mode is
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* defined by the OEM configuration parameters providing no PHY_MASK parameters
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* for any PORT. i.e. There are no phys assigned to any of the ports at start.
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* MPC Manual PORT configuration mode is defined by the OEM configuration
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* parameters providing a PHY_MASK value for any PORT. It is assumed that any
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* PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
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* A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
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* being assigned is sufficient to declare manual PORT configuration.
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*/
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enum SCIC_PORT_CONFIGURATION_MODE {
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SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
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SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
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};
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struct sci_bios_oem_param_block_hdr {
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uint8_t signature[ISCI_ROM_SIG_SIZE];
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uint16_t total_block_length;
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uint8_t hdr_length;
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uint8_t version;
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uint8_t preboot_source;
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uint8_t num_elements;
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uint8_t element_length;
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uint8_t reserved[8];
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} __attribute__ ((packed));
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struct scic_sds_oem_params {
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struct {
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uint8_t mode_type;
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uint8_t max_concurrent_dev_spin_up;
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uint8_t do_enable_ssc;
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uint8_t reserved;
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} controller;
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struct {
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uint8_t phy_mask;
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} ports[SCI_MAX_PORTS];
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struct sci_phy_oem_params {
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struct {
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uint32_t high;
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uint32_t low;
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} sas_address;
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uint32_t afe_tx_amp_control0;
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uint32_t afe_tx_amp_control1;
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uint32_t afe_tx_amp_control2;
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uint32_t afe_tx_amp_control3;
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} phys[SCI_MAX_PHYS];
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} __attribute__ ((packed));
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struct isci_orom {
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struct sci_bios_oem_param_block_hdr hdr;
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struct scic_sds_oem_params ctrl[2];
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} __attribute__ ((packed));
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#endif
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