![Anton Vorontsov](/assets/img/avatar_default.png)
On MPC837X CPUs Dual-Role USB isn't always available (for example DR USB pins can be muxed away to eSDHC). U-Boot adds status = "disabled" property into the DR USB nodes to indicate that we must not try to configure or probe Dual-Role USB, otherwise we'll break eSDHC support on targets with MPC837X CPUs. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
571 lines
13 KiB
C
571 lines
13 KiB
C
/*
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* FSL SoC setup code
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* 2006 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/major.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/phy_fixed.h>
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#include <linux/spi/spi.h>
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#include <linux/fsl_devices.h>
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#include <linux/fs_enet_pd.h>
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#include <linux/fs_uart_pd.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/time.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#include <mm/mmu_decl.h>
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#include <asm/cpm2.h>
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extern void init_fcc_ioports(struct fs_platform_info*);
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extern void init_fec_ioports(struct fs_platform_info*);
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extern void init_smc_ioports(struct fs_uart_platform_info*);
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static phys_addr_t immrbase = -1;
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phys_addr_t get_immrbase(void)
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{
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struct device_node *soc;
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if (immrbase != -1)
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return immrbase;
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soc = of_find_node_by_type(NULL, "soc");
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if (soc) {
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int size;
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u32 naddr;
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const u32 *prop = of_get_property(soc, "#address-cells", &size);
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if (prop && size == 4)
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naddr = *prop;
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else
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naddr = 2;
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prop = of_get_property(soc, "ranges", &size);
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if (prop)
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immrbase = of_translate_address(soc, prop + naddr);
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of_node_put(soc);
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}
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return immrbase;
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}
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EXPORT_SYMBOL(get_immrbase);
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static u32 sysfreq = -1;
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u32 fsl_get_sys_freq(void)
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{
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struct device_node *soc;
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const u32 *prop;
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int size;
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if (sysfreq != -1)
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return sysfreq;
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soc = of_find_node_by_type(NULL, "soc");
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if (!soc)
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return -1;
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prop = of_get_property(soc, "clock-frequency", &size);
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if (!prop || size != sizeof(*prop) || *prop == 0)
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prop = of_get_property(soc, "bus-frequency", &size);
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if (prop && size == sizeof(*prop))
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sysfreq = *prop;
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of_node_put(soc);
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return sysfreq;
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}
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EXPORT_SYMBOL(fsl_get_sys_freq);
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#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
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static u32 brgfreq = -1;
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u32 get_brgfreq(void)
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{
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struct device_node *node;
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const unsigned int *prop;
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int size;
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if (brgfreq != -1)
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return brgfreq;
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node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
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if (node) {
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prop = of_get_property(node, "clock-frequency", &size);
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if (prop && size == 4)
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brgfreq = *prop;
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of_node_put(node);
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return brgfreq;
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}
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/* Legacy device binding -- will go away when no users are left. */
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node = of_find_node_by_type(NULL, "cpm");
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if (!node)
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node = of_find_compatible_node(NULL, NULL, "fsl,qe");
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if (!node)
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node = of_find_node_by_type(NULL, "qe");
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if (node) {
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prop = of_get_property(node, "brg-frequency", &size);
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if (prop && size == 4)
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brgfreq = *prop;
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if (brgfreq == -1 || brgfreq == 0) {
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prop = of_get_property(node, "bus-frequency", &size);
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if (prop && size == 4)
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brgfreq = *prop / 2;
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}
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of_node_put(node);
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}
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return brgfreq;
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}
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EXPORT_SYMBOL(get_brgfreq);
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static u32 fs_baudrate = -1;
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u32 get_baudrate(void)
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{
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struct device_node *node;
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if (fs_baudrate != -1)
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return fs_baudrate;
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node = of_find_node_by_type(NULL, "serial");
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if (node) {
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int size;
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const unsigned int *prop = of_get_property(node,
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"current-speed", &size);
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if (prop)
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fs_baudrate = *prop;
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of_node_put(node);
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}
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return fs_baudrate;
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}
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EXPORT_SYMBOL(get_baudrate);
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#endif /* CONFIG_CPM2 */
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#ifdef CONFIG_FIXED_PHY
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static int __init of_add_fixed_phys(void)
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{
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int ret;
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struct device_node *np;
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u32 *fixed_link;
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struct fixed_phy_status status = {};
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for_each_node_by_name(np, "ethernet") {
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fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
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if (!fixed_link)
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continue;
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status.link = 1;
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status.duplex = fixed_link[1];
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status.speed = fixed_link[2];
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status.pause = fixed_link[3];
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status.asym_pause = fixed_link[4];
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ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
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if (ret) {
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of_node_put(np);
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return ret;
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}
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}
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return 0;
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}
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arch_initcall(of_add_fixed_phys);
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#endif /* CONFIG_FIXED_PHY */
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#ifdef CONFIG_PPC_83xx
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static int __init mpc83xx_wdt_init(void)
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{
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struct resource r;
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struct device_node *np;
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struct platform_device *dev;
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u32 freq = fsl_get_sys_freq();
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int ret;
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np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
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if (!np) {
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ret = -ENODEV;
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goto nodev;
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}
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memset(&r, 0, sizeof(r));
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ret = of_address_to_resource(np, 0, &r);
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if (ret)
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goto err;
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dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
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if (IS_ERR(dev)) {
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ret = PTR_ERR(dev);
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goto err;
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}
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ret = platform_device_add_data(dev, &freq, sizeof(freq));
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if (ret)
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goto unreg;
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of_node_put(np);
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return 0;
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unreg:
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platform_device_unregister(dev);
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err:
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of_node_put(np);
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nodev:
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return ret;
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}
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arch_initcall(mpc83xx_wdt_init);
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#endif
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static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
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{
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if (!phy_type)
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return FSL_USB2_PHY_NONE;
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if (!strcasecmp(phy_type, "ulpi"))
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return FSL_USB2_PHY_ULPI;
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if (!strcasecmp(phy_type, "utmi"))
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return FSL_USB2_PHY_UTMI;
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if (!strcasecmp(phy_type, "utmi_wide"))
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return FSL_USB2_PHY_UTMI_WIDE;
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if (!strcasecmp(phy_type, "serial"))
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return FSL_USB2_PHY_SERIAL;
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return FSL_USB2_PHY_NONE;
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}
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static int __init fsl_usb_of_init(void)
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{
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struct device_node *np;
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unsigned int i = 0;
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struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
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*usb_dev_dr_client = NULL;
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int ret;
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for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
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struct resource r[2];
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struct fsl_usb2_platform_data usb_data;
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const unsigned char *prop = NULL;
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memset(&r, 0, sizeof(r));
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memset(&usb_data, 0, sizeof(usb_data));
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ret = of_address_to_resource(np, 0, &r[0]);
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if (ret)
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goto err;
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of_irq_to_resource(np, 0, &r[1]);
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usb_dev_mph =
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platform_device_register_simple("fsl-ehci", i, r, 2);
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if (IS_ERR(usb_dev_mph)) {
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ret = PTR_ERR(usb_dev_mph);
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goto err;
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}
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usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
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usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
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usb_data.operating_mode = FSL_USB2_MPH_HOST;
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prop = of_get_property(np, "port0", NULL);
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if (prop)
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usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
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prop = of_get_property(np, "port1", NULL);
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if (prop)
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usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
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prop = of_get_property(np, "phy_type", NULL);
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usb_data.phy_mode = determine_usb_phy(prop);
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ret =
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platform_device_add_data(usb_dev_mph, &usb_data,
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sizeof(struct
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fsl_usb2_platform_data));
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if (ret)
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goto unreg_mph;
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i++;
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}
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for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
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struct resource r[2];
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struct fsl_usb2_platform_data usb_data;
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const unsigned char *prop = NULL;
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if (!of_device_is_available(np))
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continue;
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memset(&r, 0, sizeof(r));
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memset(&usb_data, 0, sizeof(usb_data));
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ret = of_address_to_resource(np, 0, &r[0]);
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if (ret)
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goto unreg_mph;
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of_irq_to_resource(np, 0, &r[1]);
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prop = of_get_property(np, "dr_mode", NULL);
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if (!prop || !strcmp(prop, "host")) {
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usb_data.operating_mode = FSL_USB2_DR_HOST;
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usb_dev_dr_host = platform_device_register_simple(
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"fsl-ehci", i, r, 2);
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if (IS_ERR(usb_dev_dr_host)) {
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ret = PTR_ERR(usb_dev_dr_host);
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goto err;
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}
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} else if (prop && !strcmp(prop, "peripheral")) {
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usb_data.operating_mode = FSL_USB2_DR_DEVICE;
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usb_dev_dr_client = platform_device_register_simple(
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"fsl-usb2-udc", i, r, 2);
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if (IS_ERR(usb_dev_dr_client)) {
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ret = PTR_ERR(usb_dev_dr_client);
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goto err;
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}
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} else if (prop && !strcmp(prop, "otg")) {
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usb_data.operating_mode = FSL_USB2_DR_OTG;
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usb_dev_dr_host = platform_device_register_simple(
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"fsl-ehci", i, r, 2);
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if (IS_ERR(usb_dev_dr_host)) {
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ret = PTR_ERR(usb_dev_dr_host);
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goto err;
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}
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usb_dev_dr_client = platform_device_register_simple(
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"fsl-usb2-udc", i, r, 2);
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if (IS_ERR(usb_dev_dr_client)) {
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ret = PTR_ERR(usb_dev_dr_client);
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goto err;
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}
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} else {
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ret = -EINVAL;
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goto err;
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}
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prop = of_get_property(np, "phy_type", NULL);
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usb_data.phy_mode = determine_usb_phy(prop);
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if (usb_dev_dr_host) {
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usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
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usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
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dev.coherent_dma_mask;
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if ((ret = platform_device_add_data(usb_dev_dr_host,
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&usb_data, sizeof(struct
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fsl_usb2_platform_data))))
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goto unreg_dr;
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}
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if (usb_dev_dr_client) {
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usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
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usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
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dev.coherent_dma_mask;
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if ((ret = platform_device_add_data(usb_dev_dr_client,
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&usb_data, sizeof(struct
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fsl_usb2_platform_data))))
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goto unreg_dr;
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}
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i++;
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}
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return 0;
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unreg_dr:
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if (usb_dev_dr_host)
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platform_device_unregister(usb_dev_dr_host);
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if (usb_dev_dr_client)
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platform_device_unregister(usb_dev_dr_client);
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unreg_mph:
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if (usb_dev_mph)
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platform_device_unregister(usb_dev_mph);
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err:
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return ret;
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}
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arch_initcall(fsl_usb_of_init);
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static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
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struct spi_board_info *board_infos,
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unsigned int num_board_infos,
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void (*activate_cs)(u8 cs, u8 polarity),
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void (*deactivate_cs)(u8 cs, u8 polarity))
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{
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struct device_node *np;
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unsigned int i = 0;
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for_each_compatible_node(np, type, compatible) {
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int ret;
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unsigned int j;
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const void *prop;
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struct resource res[2];
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struct platform_device *pdev;
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struct fsl_spi_platform_data pdata = {
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.activate_cs = activate_cs,
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.deactivate_cs = deactivate_cs,
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};
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memset(res, 0, sizeof(res));
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pdata.sysclk = sysclk;
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prop = of_get_property(np, "reg", NULL);
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if (!prop)
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goto err;
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pdata.bus_num = *(u32 *)prop;
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prop = of_get_property(np, "cell-index", NULL);
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if (prop)
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i = *(u32 *)prop;
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prop = of_get_property(np, "mode", NULL);
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if (prop && !strcmp(prop, "cpu-qe"))
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pdata.qe_mode = 1;
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for (j = 0; j < num_board_infos; j++) {
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if (board_infos[j].bus_num == pdata.bus_num)
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pdata.max_chipselect++;
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}
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if (!pdata.max_chipselect)
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continue;
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ret = of_address_to_resource(np, 0, &res[0]);
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if (ret)
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goto err;
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ret = of_irq_to_resource(np, 0, &res[1]);
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if (ret == NO_IRQ)
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goto err;
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pdev = platform_device_alloc("mpc83xx_spi", i);
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if (!pdev)
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goto err;
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ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
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if (ret)
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goto unreg;
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ret = platform_device_add_resources(pdev, res,
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ARRAY_SIZE(res));
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if (ret)
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goto unreg;
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ret = platform_device_add(pdev);
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if (ret)
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goto unreg;
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goto next;
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unreg:
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platform_device_del(pdev);
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err:
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pr_err("%s: registration failed\n", np->full_name);
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next:
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i++;
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}
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return i;
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}
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int __init fsl_spi_init(struct spi_board_info *board_infos,
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unsigned int num_board_infos,
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void (*activate_cs)(u8 cs, u8 polarity),
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void (*deactivate_cs)(u8 cs, u8 polarity))
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{
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u32 sysclk = -1;
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int ret;
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#ifdef CONFIG_QUICC_ENGINE
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/* SPI controller is either clocked from QE or SoC clock */
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sysclk = get_brgfreq();
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#endif
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if (sysclk == -1) {
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sysclk = fsl_get_sys_freq();
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if (sysclk == -1)
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return -ENODEV;
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}
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ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
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num_board_infos, activate_cs, deactivate_cs);
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if (!ret)
|
|
of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
|
|
num_board_infos, activate_cs, deactivate_cs);
|
|
|
|
return spi_register_board_info(board_infos, num_board_infos);
|
|
}
|
|
|
|
#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
|
|
static __be32 __iomem *rstcr;
|
|
|
|
static int __init setup_rstcr(void)
|
|
{
|
|
struct device_node *np;
|
|
np = of_find_node_by_name(NULL, "global-utilities");
|
|
if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
|
|
const u32 *prop = of_get_property(np, "reg", NULL);
|
|
if (prop) {
|
|
/* map reset control register
|
|
* 0xE00B0 is offset of reset control register
|
|
*/
|
|
rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
|
|
if (!rstcr)
|
|
printk (KERN_EMERG "Error: reset control "
|
|
"register not mapped!\n");
|
|
}
|
|
} else
|
|
printk (KERN_INFO "rstcr compatible register does not exist!\n");
|
|
if (np)
|
|
of_node_put(np);
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(setup_rstcr);
|
|
|
|
void fsl_rstcr_restart(char *cmd)
|
|
{
|
|
local_irq_disable();
|
|
if (rstcr)
|
|
/* set reset control register */
|
|
out_be32(rstcr, 0x2); /* HRESET_REQ */
|
|
|
|
while (1) ;
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
|
|
struct platform_diu_data_ops diu_ops;
|
|
EXPORT_SYMBOL(diu_ops);
|
|
#endif
|