![Alexander Beregalov](/assets/img/avatar_default.png)
Cc: David Kiliani <mail@davidkiliani.de> Signed-off-by: Alexander Beregalov <a.beregalov@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
690 lines
18 KiB
C
690 lines
18 KiB
C
/**
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* @file me8100_di.c
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*
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* @brief ME-8100 digital input subdevice instance.
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* @note Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
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* @author Guenter Gebhardt
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* @author Krzysztof Gantzke (k.gantzke@meilhaus.de)
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*/
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/*
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* Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __KERNEL__
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# define __KERNEL__
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#endif
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/*
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* Includes
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/version.h>
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#include "medefines.h"
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#include "meerror.h"
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#include "meids.h"
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#include "medebug.h"
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#include "meplx_reg.h"
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#include "me8100_reg.h"
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#include "me8100_di_reg.h"
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#include "me8100_di.h"
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/*
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* Defines
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*/
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/*
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* Functions
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*/
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static int me8100_di_io_reset_subdevice(struct me_subdevice *subdevice,
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struct file *filep, int flags)
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{
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me8100_di_subdevice_t *instance;
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unsigned short ctrl;
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unsigned long cpu_flags;
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PDEBUG("executed.\n");
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instance = (me8100_di_subdevice_t *) subdevice;
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if (flags) {
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PERROR("Invalid flag specified.\n");
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return ME_ERRNO_INVALID_FLAGS;
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}
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ME_SUBDEVICE_ENTER;
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spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
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spin_lock(instance->ctrl_reg_lock);
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ctrl = inw(instance->ctrl_reg);
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ctrl &= ~(ME8100_DIO_CTRL_BIT_INTB_1 | ME8100_DIO_CTRL_BIT_INTB_0);
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outw(ctrl, instance->ctrl_reg);
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PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
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instance->ctrl_reg - instance->reg_base, ctrl);
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spin_unlock(instance->ctrl_reg_lock);
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outw(0, instance->mask_reg);
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PDEBUG_REG("mask_reg outw(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
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instance->mask_reg - instance->reg_base, 0);
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outw(0, instance->pattern_reg);
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PDEBUG_REG("pattern_reg outw(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
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instance->pattern_reg - instance->reg_base, 0);
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instance->rised = -1;
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instance->irq_count = 0;
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instance->filtering_flag = 0;
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spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
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outl(PLX_INTCSR_LOCAL_INT1_EN |
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PLX_INTCSR_LOCAL_INT1_POL |
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PLX_INTCSR_LOCAL_INT2_EN |
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PLX_INTCSR_LOCAL_INT2_POL |
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PLX_INTCSR_PCI_INT_EN, instance->irq_status_reg);
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PDEBUG_REG("plx:irq_status_reg outl(0x%lX)=0x%x\n",
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instance->irq_status_reg,
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PLX_INTCSR_LOCAL_INT1_EN | PLX_INTCSR_LOCAL_INT1_POL |
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PLX_INTCSR_LOCAL_INT2_EN | PLX_INTCSR_LOCAL_INT2_POL |
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PLX_INTCSR_PCI_INT_EN);
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wake_up_interruptible_all(&instance->wait_queue);
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ME_SUBDEVICE_EXIT;
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return ME_ERRNO_SUCCESS;
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}
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static int me8100_di_io_irq_start(me_subdevice_t *subdevice,
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struct file *filep,
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int channel,
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int irq_source,
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int irq_edge, int irq_arg, int flags)
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{
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me8100_di_subdevice_t *instance;
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int err = ME_ERRNO_SUCCESS;
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uint16_t ctrl;
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unsigned long cpu_flags;
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PDEBUG("executed.\n");
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instance = (me8100_di_subdevice_t *) subdevice;
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if (irq_source == ME_IRQ_SOURCE_DIO_PATTERN) {
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if (flags &
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~(ME_IO_IRQ_START_PATTERN_FILTERING |
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ME_IO_IRQ_START_DIO_WORD)) {
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PERROR("Invalid flag specified.\n");
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return ME_ERRNO_INVALID_FLAGS;
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}
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if (irq_edge != ME_IRQ_EDGE_NOT_USED) {
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PERROR("Invalid irq edge specified.\n");
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return ME_ERRNO_INVALID_IRQ_EDGE;
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}
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} else if (irq_source == ME_IRQ_SOURCE_DIO_MASK) {
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if (flags &
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~(ME_IO_IRQ_START_EXTENDED_STATUS |
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ME_IO_IRQ_START_DIO_WORD)) {
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PERROR("Invalid flag specified.\n");
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return ME_ERRNO_INVALID_FLAGS;
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}
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if (irq_edge != ME_IRQ_EDGE_ANY) {
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PERROR("Invalid irq edge specified.\n");
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return ME_ERRNO_INVALID_IRQ_EDGE;
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}
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if (!(irq_arg & 0xFFFF)) {
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PERROR("No mask specified.\n");
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return ME_ERRNO_INVALID_IRQ_ARG;
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}
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} else {
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PERROR("Invalid irq source specified.\n");
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return ME_ERRNO_INVALID_IRQ_SOURCE;
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}
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if (channel) {
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PERROR("Invalid channel specified.\n");
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return ME_ERRNO_INVALID_CHANNEL;
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}
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ME_SUBDEVICE_ENTER;
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spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
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if (irq_source == ME_IRQ_SOURCE_DIO_PATTERN) {
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outw(irq_arg, instance->pattern_reg);
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instance->compare_value = irq_arg;
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instance->filtering_flag =
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(flags & ME_IO_IRQ_START_PATTERN_FILTERING) ? 1 : 0;
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}
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if (irq_source == ME_IRQ_SOURCE_DIO_MASK) {
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outw(irq_arg, instance->mask_reg);
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}
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spin_lock(instance->ctrl_reg_lock);
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ctrl = inw(instance->ctrl_reg);
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ctrl |= ME8100_DIO_CTRL_BIT_INTB_0;
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if (irq_source == ME_IRQ_SOURCE_DIO_PATTERN) {
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ctrl &= ~ME8100_DIO_CTRL_BIT_INTB_1;
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}
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if (irq_source == ME_IRQ_SOURCE_DIO_MASK) {
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ctrl |= ME8100_DIO_CTRL_BIT_INTB_1;
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}
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outw(ctrl, instance->ctrl_reg);
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PDEBUG_REG("ctrl_reg outw(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
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instance->ctrl_reg - instance->reg_base, ctrl);
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spin_unlock(instance->ctrl_reg_lock);
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instance->rised = 0;
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instance->status_value = 0;
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instance->status_value_edges = 0;
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instance->line_value = inw(instance->port_reg);
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instance->status_flag = flags & ME_IO_IRQ_START_EXTENDED_STATUS;
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spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
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ME_SUBDEVICE_EXIT;
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return err;
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}
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static int me8100_di_io_irq_wait(me_subdevice_t *subdevice,
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struct file *filep,
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int channel,
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int *irq_count,
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int *value, int time_out, int flags)
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{
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me8100_di_subdevice_t *instance;
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int err = ME_ERRNO_SUCCESS;
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long t = 0;
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unsigned long cpu_flags;
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int count;
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PDEBUG("executed.\n");
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PDEVELOP("PID: %d.\n", current->pid);
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instance = (me8100_di_subdevice_t *) subdevice;
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if (flags &
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~(ME_IO_IRQ_WAIT_NORMAL_STATUS | ME_IO_IRQ_WAIT_EXTENDED_STATUS)) {
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PERROR("Invalid flag specified.\n");
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return ME_ERRNO_INVALID_FLAGS;
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}
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if (channel) {
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PERROR("Invalid channel specified.\n");
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return ME_ERRNO_INVALID_CHANNEL;
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}
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if (time_out < 0) {
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PERROR("Invalid time_out specified.\n");
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return ME_ERRNO_INVALID_TIMEOUT;
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}
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if (time_out) {
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t = (time_out * HZ) / 1000;
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if (t == 0)
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t = 1;
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}
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ME_SUBDEVICE_ENTER;
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if (instance->rised <= 0) {
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instance->rised = 0;
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count = instance->irq_count;
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if (time_out) {
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t = wait_event_interruptible_timeout(instance->
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wait_queue,
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((count !=
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instance->
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irq_count)
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|| (instance->
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rised < 0)),
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t);
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// t = wait_event_interruptible_timeout(instance->wait_queue, (instance->rised != 0), t);
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if (t == 0) {
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PERROR("Wait on interrupt timed out.\n");
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err = ME_ERRNO_TIMEOUT;
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}
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} else {
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wait_event_interruptible(instance->wait_queue,
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((count != instance->irq_count)
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|| (instance->rised < 0)));
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// wait_event_interruptible(instance->wait_queue, (instance->rised != 0));
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}
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if (instance->rised < 0) {
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PERROR("Wait on interrupt aborted by user.\n");
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err = ME_ERRNO_CANCELLED;
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}
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}
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if (signal_pending(current)) {
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PERROR("Wait on interrupt aborted by signal.\n");
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err = ME_ERRNO_SIGNAL;
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}
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spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
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*irq_count = instance->irq_count;
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if (!err) {
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if (flags & ME_IO_IRQ_WAIT_NORMAL_STATUS) {
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*value = instance->status_value;
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} else if (flags & ME_IO_IRQ_WAIT_EXTENDED_STATUS) {
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*value = instance->status_value_edges;
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} else { // Use default
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if (!instance->status_flag) {
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*value = instance->status_value;
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} else {
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*value = instance->status_value_edges;
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}
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}
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instance->rised = 0;
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/*
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instance->status_value = 0;
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instance->status_value_edges = 0;
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*/
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} else {
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*value = 0;
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}
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spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
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ME_SUBDEVICE_EXIT;
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return err;
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}
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static int me8100_di_io_irq_stop(me_subdevice_t *subdevice,
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struct file *filep, int channel, int flags)
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{
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me8100_di_subdevice_t *instance;
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uint16_t ctrl;
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unsigned long cpu_flags;
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PDEBUG("executed.\n");
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instance = (me8100_di_subdevice_t *) subdevice;
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if (flags) {
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PERROR("Invalid flag specified.\n");
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return ME_ERRNO_INVALID_FLAGS;
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}
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if (channel) {
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PERROR("Invalid channel specified.\n");
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return ME_ERRNO_INVALID_CHANNEL;
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}
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ME_SUBDEVICE_ENTER;
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spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
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spin_lock(instance->ctrl_reg_lock);
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ctrl = inw(instance->ctrl_reg);
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ctrl &= ~(ME8100_DIO_CTRL_BIT_INTB_1 | ME8100_DIO_CTRL_BIT_INTB_0);
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outw(ctrl, instance->ctrl_reg);
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PDEBUG_REG("ctrl_reg outw(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
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instance->ctrl_reg - instance->reg_base, ctrl);
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spin_unlock(instance->ctrl_reg_lock);
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instance->rised = -1;
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instance->status_value = 0;
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instance->status_value_edges = 0;
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instance->filtering_flag = 0;
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spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
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wake_up_interruptible_all(&instance->wait_queue);
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ME_SUBDEVICE_EXIT;
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return ME_ERRNO_SUCCESS;
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}
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static int me8100_di_io_single_config(me_subdevice_t *subdevice,
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struct file *filep,
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int channel,
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int single_config,
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int ref,
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int trig_chan,
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int trig_type, int trig_edge, int flags)
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{
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me8100_di_subdevice_t *instance;
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int err = ME_ERRNO_SUCCESS;
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PDEBUG("executed.\n");
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instance = (me8100_di_subdevice_t *) subdevice;
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ME_SUBDEVICE_ENTER;
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spin_lock(&instance->subdevice_lock);
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switch (flags) {
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case ME_IO_SINGLE_CONFIG_NO_FLAGS:
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case ME_IO_SINGLE_CONFIG_DIO_WORD:
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if (channel == 0) {
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if (single_config == ME_SINGLE_CONFIG_DIO_INPUT) {
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} else {
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PERROR
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("Invalid port configuration specified.\n");
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err = ME_ERRNO_INVALID_SINGLE_CONFIG;
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}
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} else {
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PERROR("Invalid channel number.\n");
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err = ME_ERRNO_INVALID_CHANNEL;
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}
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break;
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default:
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PERROR("Invalid flags specified.\n");
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err = ME_ERRNO_INVALID_FLAGS;
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}
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spin_unlock(&instance->subdevice_lock);
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ME_SUBDEVICE_EXIT;
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return err;
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}
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static int me8100_di_io_single_read(me_subdevice_t *subdevice,
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struct file *filep,
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int channel,
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int *value, int time_out, int flags)
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{
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me8100_di_subdevice_t *instance;
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int err = ME_ERRNO_SUCCESS;
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PDEBUG("executed.\n");
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instance = (me8100_di_subdevice_t *) subdevice;
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ME_SUBDEVICE_ENTER;
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spin_lock(&instance->subdevice_lock);
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switch (flags) {
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case ME_IO_SINGLE_TYPE_DIO_BIT:
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if ((channel >= 0) && (channel < 16)) {
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*value = inw(instance->port_reg) & (0x1 << channel);
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} else {
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PERROR("Invalid bit number specified.\n");
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err = ME_ERRNO_INVALID_CHANNEL;
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}
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break;
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case ME_IO_SINGLE_TYPE_DIO_BYTE:
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if (channel == 0) {
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*value = inw(instance->port_reg) & 0xFF;
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} else if (channel == 1) {
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*value = (inw(instance->port_reg) >> 8) & 0xFF;
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} else {
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PERROR("Invalid byte number specified.\n");
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err = ME_ERRNO_INVALID_CHANNEL;
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}
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break;
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case ME_IO_SINGLE_NO_FLAGS:
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case ME_IO_SINGLE_TYPE_DIO_WORD:
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if (channel == 0) {
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*value = inw(instance->port_reg);
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} else {
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PERROR("Invalid word number specified.\n");
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err = ME_ERRNO_INVALID_CHANNEL;
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}
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break;
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default:
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PERROR("Invalid flags specified.\n");
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err = ME_ERRNO_INVALID_FLAGS;
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}
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spin_unlock(&instance->subdevice_lock);
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ME_SUBDEVICE_EXIT;
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return err;
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}
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static int me8100_di_query_number_channels(me_subdevice_t *subdevice,
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int *number)
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{
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PDEBUG("executed.\n");
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*number = 16;
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return ME_ERRNO_SUCCESS;
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}
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static int me8100_di_query_subdevice_type(me_subdevice_t *subdevice,
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int *type, int *subtype)
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{
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PDEBUG("executed.\n");
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*type = ME_TYPE_DI;
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*subtype = ME_SUBTYPE_SINGLE;
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return ME_ERRNO_SUCCESS;
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}
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static int me8100_di_query_subdevice_caps(me_subdevice_t *subdevice, int *caps)
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{
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PDEBUG("executed.\n");
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*caps = ME_CAPS_DIO_BIT_PATTERN_IRQ | ME_CAPS_DIO_BIT_MASK_IRQ_EDGE_ANY;
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return ME_ERRNO_SUCCESS;
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}
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static void me8100_di_destructor(struct me_subdevice *subdevice)
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{
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me8100_di_subdevice_t *instance;
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PDEBUG("executed.\n");
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instance = (me8100_di_subdevice_t *) subdevice;
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free_irq(instance->irq, (void *)instance);
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me_subdevice_deinit(&instance->base);
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kfree(instance);
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}
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static irqreturn_t me8100_isr(int irq, void *dev_id)
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{
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me8100_di_subdevice_t *instance;
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uint32_t icsr;
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uint16_t irq_status;
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uint16_t line_value = 0;
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uint32_t status_val = 0;
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PDEBUG("executed.\n");
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instance = (me8100_di_subdevice_t *) dev_id;
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if (irq != instance->irq) {
|
|
PERROR("Incorrect interrupt num: %d.\n", irq);
|
|
return IRQ_NONE;
|
|
}
|
|
|
|
icsr = inl(instance->irq_status_reg);
|
|
if (instance->di_idx == 0) {
|
|
|
|
if ((icsr &
|
|
(PLX_INTCSR_LOCAL_INT1_STATE | PLX_INTCSR_PCI_INT_EN |
|
|
PLX_INTCSR_LOCAL_INT1_EN)) !=
|
|
(PLX_INTCSR_LOCAL_INT1_STATE | PLX_INTCSR_PCI_INT_EN |
|
|
PLX_INTCSR_LOCAL_INT1_EN)) {
|
|
PINFO
|
|
("%ld Shared interrupt. %s(): idx=0 plx:irq_status_reg=0x%04X\n",
|
|
jiffies, __func__, icsr);
|
|
return IRQ_NONE;
|
|
}
|
|
} else if (instance->di_idx == 1) {
|
|
if ((icsr &
|
|
(PLX_INTCSR_LOCAL_INT2_STATE | PLX_INTCSR_PCI_INT_EN |
|
|
PLX_INTCSR_LOCAL_INT2_EN)) !=
|
|
(PLX_INTCSR_LOCAL_INT2_STATE | PLX_INTCSR_PCI_INT_EN |
|
|
PLX_INTCSR_LOCAL_INT2_EN)) {
|
|
PINFO
|
|
("%ld Shared interrupt. %s(): idx=1 plx:irq_status_reg=0x%04X\n",
|
|
jiffies, __func__, icsr);
|
|
return IRQ_NONE;
|
|
}
|
|
} else {
|
|
PERROR("%s():Wrong interrupt idx=%d csr=0x%X.\n", __func__,
|
|
instance->di_idx, icsr);
|
|
return IRQ_NONE;
|
|
}
|
|
|
|
PDEBUG("me8100_isr():Interrupt from idx=%d occured.\n",
|
|
instance->di_idx);
|
|
spin_lock(&instance->subdevice_lock);
|
|
inw(instance->irq_reset_reg);
|
|
line_value = inw(instance->port_reg);
|
|
|
|
irq_status = instance->line_value ^ line_value;
|
|
|
|
// Make extended information.
|
|
status_val |= (0x00FF & (~(uint16_t) instance->line_value & line_value)) << 16; //Raise
|
|
status_val |= (0x00FF & ((uint16_t) instance->line_value & ~line_value)); //Fall
|
|
|
|
instance->line_value = line_value;
|
|
|
|
if (instance->rised == 0) {
|
|
instance->status_value = irq_status;
|
|
instance->status_value_edges = status_val;
|
|
} else {
|
|
instance->status_value |= irq_status;
|
|
instance->status_value_edges |= status_val;
|
|
}
|
|
|
|
if (instance->filtering_flag) { // For compare mode only.
|
|
if (instance->compare_value == instance->line_value) {
|
|
instance->rised = 1;
|
|
instance->irq_count++;
|
|
}
|
|
} else {
|
|
instance->rised = 1;
|
|
instance->irq_count++;
|
|
}
|
|
|
|
spin_unlock(&instance->subdevice_lock);
|
|
wake_up_interruptible_all(&instance->wait_queue);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
me8100_di_subdevice_t *me8100_di_constructor(uint32_t me8100_reg_base,
|
|
uint32_t plx_reg_base,
|
|
unsigned int di_idx,
|
|
int irq,
|
|
spinlock_t *ctrl_reg_lock)
|
|
{
|
|
me8100_di_subdevice_t *subdevice;
|
|
int err;
|
|
|
|
PDEBUG("executed.\n");
|
|
|
|
/* Allocate memory for subdevice instance */
|
|
subdevice = kmalloc(sizeof(me8100_di_subdevice_t), GFP_KERNEL);
|
|
|
|
if (!subdevice) {
|
|
PERROR("Cannot get memory for subdevice instance.\n");
|
|
return NULL;
|
|
}
|
|
|
|
memset(subdevice, 0, sizeof(me8100_di_subdevice_t));
|
|
|
|
/* Initialize subdevice base class */
|
|
err = me_subdevice_init(&subdevice->base);
|
|
|
|
if (err) {
|
|
PERROR("Cannot initialize subdevice base class instance.\n");
|
|
kfree(subdevice);
|
|
return NULL;
|
|
}
|
|
// Initialize spin locks.
|
|
spin_lock_init(&subdevice->subdevice_lock);
|
|
|
|
subdevice->ctrl_reg_lock = ctrl_reg_lock;
|
|
|
|
/* Save the subdevice index. */
|
|
subdevice->di_idx = di_idx;
|
|
|
|
/* Initialize wait queue */
|
|
init_waitqueue_head(&subdevice->wait_queue);
|
|
|
|
/* Register interrupt service routine. */
|
|
subdevice->irq = irq;
|
|
err = request_irq(subdevice->irq, me8100_isr,
|
|
#ifdef IRQF_DISABLED
|
|
IRQF_DISABLED | IRQF_SHARED,
|
|
#else
|
|
SA_INTERRUPT | SA_SHIRQ,
|
|
#endif
|
|
ME8100_NAME, (void *)subdevice);
|
|
|
|
if (err) {
|
|
PERROR("Cannot initialize subdevice base class instance.\n");
|
|
kfree(subdevice);
|
|
return NULL;
|
|
}
|
|
PINFO("Registered irq=%d.\n", subdevice->irq);
|
|
|
|
/* Initialize the registers */
|
|
subdevice->ctrl_reg =
|
|
me8100_reg_base + ME8100_CTRL_REG_A + di_idx * ME8100_REG_OFFSET;
|
|
subdevice->port_reg =
|
|
me8100_reg_base + ME8100_DI_REG_A + di_idx * ME8100_REG_OFFSET;
|
|
subdevice->mask_reg =
|
|
me8100_reg_base + ME8100_MASK_REG_A + di_idx * ME8100_REG_OFFSET;
|
|
subdevice->pattern_reg =
|
|
me8100_reg_base + ME8100_PATTERN_REG_A + di_idx * ME8100_REG_OFFSET;
|
|
subdevice->din_int_reg =
|
|
me8100_reg_base + ME8100_INT_DI_REG_A + di_idx * ME8100_REG_OFFSET;
|
|
subdevice->irq_reset_reg =
|
|
me8100_reg_base + ME8100_RES_INT_REG_A + di_idx * ME8100_REG_OFFSET;
|
|
subdevice->irq_status_reg = plx_reg_base + PLX_INTCSR;
|
|
#ifdef MEDEBUG_DEBUG_REG
|
|
subdevice->reg_base = me8100_reg_base;
|
|
#endif
|
|
|
|
/* Overload base class methods. */
|
|
subdevice->base.me_subdevice_io_irq_start = me8100_di_io_irq_start;
|
|
subdevice->base.me_subdevice_io_irq_wait = me8100_di_io_irq_wait;
|
|
subdevice->base.me_subdevice_io_irq_stop = me8100_di_io_irq_stop;
|
|
subdevice->base.me_subdevice_io_reset_subdevice =
|
|
me8100_di_io_reset_subdevice;
|
|
subdevice->base.me_subdevice_io_single_config =
|
|
me8100_di_io_single_config;
|
|
subdevice->base.me_subdevice_io_single_read = me8100_di_io_single_read;
|
|
subdevice->base.me_subdevice_query_number_channels =
|
|
me8100_di_query_number_channels;
|
|
subdevice->base.me_subdevice_query_subdevice_type =
|
|
me8100_di_query_subdevice_type;
|
|
subdevice->base.me_subdevice_query_subdevice_caps =
|
|
me8100_di_query_subdevice_caps;
|
|
subdevice->base.me_subdevice_destructor = me8100_di_destructor;
|
|
|
|
subdevice->rised = 0;
|
|
subdevice->irq_count = 0;
|
|
|
|
return subdevice;
|
|
}
|