430 lines
9.7 KiB
NASM
430 lines
9.7 KiB
NASM
CPU SC14421
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ORG 0
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BR Start
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PB_LED EQU 0x80
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PB_RX_ON EQU 0x40
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PB_TX_ON EQU 0x10
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PB_RADIOPOWER EQU 0x04
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PB_DCTHRESHOLD EQU 0x02
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PB_RSSI EQU 0x01
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; synchronisation control
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PSC_ARPD1 EQU 0x80
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PSC_S_SYNC EQU 0x40
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PSC_S_SYNC_ON EQU 0x20
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PSC_EOPSM EQU 0x10
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; memory banks 0-7, lower and upper halfs (128 bytes each)
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BANK0_LOW EQU 0x00
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BANK0_HIGH EQU 0x10
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BANK1_LOW EQU 0x20
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BANK1_HIGH EQU 0x30
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BANK2_LOW EQU 0x40
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BANK2_HIGH EQU 0x50
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BANK3_LOW EQU 0x60
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BANK3_HIGH EQU 0x70
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BANK4_LOW EQU 0x80
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BANK4_HIGH EQU 0x90
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BANK5_LOW EQU 0xa0
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BANK5_HIGH EQU 0xb0
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BANK6_LOW EQU 0xc0
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BANK6_HIGH EQU 0xd0
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BANK7_LOW EQU 0xe0
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BANK7_HIGH EQU 0xf0
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; Codec Control
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DIP_CC_INIT EQU 0x10
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; Radio configuration word
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RF_DESC EQU 0x65
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; BMC control information
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BMC_CTRL_SIZE EQU 7
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BMC_CTRL EQU 0x69
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; (multi) frame number for scambler and DCS
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BMC_CTRL_MFR_OFF EQU 6
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; Cipher IV/Key
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DCS_DESC EQU 0x70
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DCS_IV EQU DCS_DESC
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DCS_CK EQU DCS_DESC + 0x8
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; Cipher state
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DCS_STATE EQU 0x70
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DCS_STATE_SIZE EQU 11
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SD_PREAMBLE_OFF EQU 0x01
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SD_A_FIELD_OFF EQU 0x06
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SD_B_FIELD_OFF EQU 0x0E
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; status descriptor
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SD_BASE_OFF EQU 0x00
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SD_RSSI_OFF EQU 0x00
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SD_CSUM_OFF EQU 0x01
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SD_DATA_OFF EQU 0x06
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; U2785 radio
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U2785_CFG1_LEN EQU 24
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U2785_CFG2_LEN EQU 9
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;-------------------------------------------------------------
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Start: BR InitDIP
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;-------------------------------------------------------------
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SlotTable: SLOTZERO
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Slot00: WT 1
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WNT 1
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Slot01: WT 1
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WNT 1
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Slot02: WT 1
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WNT 1
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Slot03: WT 1
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WNT 1
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Slot04: WT 1
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WNT 1
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Slot05: WT 1
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WNT 1
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U_INT0
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Slot06: WT 1
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WNT 1
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Slot07: WT 1
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WNT 1
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Slot08: WT 1
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WNT 1
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Slot09: WT 1
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WNT 1
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Slot10: WT 1
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WNT 1
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Slot11: WT 1
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WNT 1
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U_INT1
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Slot12: WT 1
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WNT 1
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Slot13: WT 1
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WNT 1
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Slot14: WT 1
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WNT 1
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Slot15: WT 1
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WNT 1
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Slot16: WT 1
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WNT 1
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Slot17: WT 1
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WNT 1
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U_INT2
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Slot18: WT 1
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WNT 1
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Slot19: WT 1
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WNT 1
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Slot20: WT 1
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WNT 1
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Slot21: WT 1
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WNT 1
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Slot22: WT 1
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WNT 1
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Slot23: WT 1
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WNT 1
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U_INT3
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BR SlotTable
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;-------------------------------------------------------------------------------
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; Receive a P00 packet
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;
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RX_P00: JMP Receive ; Receive S- and beginning of A-field |
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RX_P00_End: B_BRFU SD_B_FIELD_OFF ; Receive unprotected full-slot B-field | p: 95 A: 63
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JMP ReceiveEnd ; End reception | p: 96 B: 0
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BR WriteBMC1 ;
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RX_P00_Sync: JMP ReceiveSync ; Receive S- and beginning of A-field |
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BR RX_P00_End
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; Receive a P32 packet using the the unprotected full slot B-field format in
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; the D32-field
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;
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RX_P32U_Enc: JMP LoadEncKey
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RX_P32U: JMP Receive
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B_BRFU SD_B_FIELD_OFF ; Receive unprotected full-slot B-field | p: 95 A: 63
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JMP RX_P32U_BZ ; Receive B-field | p: 96 B: 0
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BR WriteBMC2
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RX_P640j_Enc: JMP LoadEncKey
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RX_P640j: JMP Receive
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B_BR SD_B_FIELD_OFF
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JMP Transfer_P640j
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WT 14 ; 15 - 1 (RTN)
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B_XR
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JMP ReceiveEnd
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BR WriteBMC2
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;-------------------------------------------------------------------------------
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; Transmit a P00 packet
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;
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TX_P00: JMP Transmit ; Transmit S- and beginning of A-field |
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JMP TransmitEnd ; End transmission | p: 94 A: 62
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BR label_53 ;
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; Transmit a P32 packet using the unprotected full slot B-field format in the
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; D32-field
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;
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TX_P32U_Enc: JMP LoadEncKey
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TX_P32U: JMP Transmit ; Transmit S- and beginning of A-field |
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B_BTFU SD_B_FIELD_OFF ; Transmit unprotected full-slot B-field data | p: 95 A: 63
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JMP TX_P32U_BZ ; Transmit the B- and Z-fields | p: 96 B: 0
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BR label_54 ;
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TX_P640j_Enc: JMP LoadEncKey
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TX_P640j: JMP Transmit
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B_BT SD_B_FIELD_OFF
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WT 3 ; B_BT has 3 bits of latency
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JMP Transfer_P640j
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WT 11 ; 15 - 1 (RTN) - 3 (latency)
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B_XT
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WT 13 ; 8 (X/Z-Field) + 5
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B_RST
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JMP TransmitEnd
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BR label_58
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Transfer_B: WT 45 ; 47 - 2 (JMP/JMP, JMP/RTN)
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B_XON
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WT 15
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B_XOFF
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RTN
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Transfer_P640j: JMP Transfer_B
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JMP Transfer_B
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JMP Transfer_B
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JMP Transfer_B
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JMP Transfer_B
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JMP Transfer_B
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JMP Transfer_B
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JMP Transfer_B
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JMP Transfer_B
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WT 46 ; 47 - 1 (RTN)
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B_XON
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RTN
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;-------------------------------------------------------------------------------
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WriteBMC1: B_WRS SD_BASE_OFF ; write status
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WT 6
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label_53: B_RST
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label_54: P_LDL PB_RX_ON | PB_TX_ON
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WT 5
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WNT 1
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RTN
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;-------------------------------------------------------------------------------
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WriteBMC2: B_WRS SD_BASE_OFF ; write status
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WT 6
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label_58: B_RST
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P_LDL PB_RX_ON | PB_TX_ON
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RTN
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ReceiveInit: B_RST
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B_RC BMC_CTRL
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WT BMC_CTRL_SIZE + 1
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P_LDH PB_RX_ON
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P_LDL PB_RSSI ; enable RSSI measurement
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WT 25
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WNT 1 ; Wait until beginning of slot |
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WT 7 ; | p: -33--26
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RTN
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;-------------------------------------------------------------------------------
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; Enable the receiver, receive the S-field and the first 61 bits of the D-field
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; (93 bits total)
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;
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Receive: JMP ReceiveInit
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B_XON ; | p: -25
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ClockSyncOn: P_SC PSC_S_SYNC_ON ; | p: -24
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P_LDH PB_DCTHRESHOLD ; | p: -23
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WT 5 ; | p: -22--16
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B_SR ; Receive S-field | p: -17
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ClockAdjust: EN_SL_ADJ ; | p: -16 S: 0
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WT 12 ; | p: -15--4 S: 1-12
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P_LDL PB_DCTHRESHOLD ; | p: -3 S: 13
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WT 32 ; | p: -2-29 S: 14-45
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ClockSyncOff: P_SC 0x00 ; | p: 30 S: 46
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B_AR2 SD_A_FIELD_OFF ; Start reception of A-field/A-field CRC | p: 31 S: 47
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WT 62 ; Receive first 61 bits of A-field | p: 32-92 A: 0-60
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RTN ; Return | p: 93 A: 61
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ReceiveSync: JMP ReceiveInit
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B_XON ; | p: -25
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P_SC PSC_S_SYNC_ON ; | p: -24
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P_LDH PB_DCTHRESHOLD ; | p: -23
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WT 5 ; | p: -22--16
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B_SR ; Receive S-field | p: -17
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EN_SL_ADJ ; | p: -16 S: 0
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WT 12 ; | p: -15--4 S: 1-12
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P_LDL PB_DCTHRESHOLD ; | p: -3 S: 13
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WT 32 ; | p: -2-29 S: 14-45
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P_SC 0x00 ; | p: 30 S: 46
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B_AR2 SD_A_FIELD_OFF ; Start reception of A-field/A-field CRC | p: 31 S: 47
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WT 61 ; Receive first 61 bits of A-field | p: 32-92 A: 0-60
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RTN ; Return | p: 93 A: 61
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; Receive the B- and Z-fields of a P32 packet using the protected full slot
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; B-field format in the D32-field
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RX_P32U_BZ: WT 249 ; | p: 97-345 B: 1-249
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WT 79 ; | p: 346-415 B: 250-319
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; | p: 416-419 B: 320-323 X: 0-3
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; | p: 420-423 Z: 0- 3
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; | p: 424 ??
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ReceiveEnd: P_LDH PB_RSSI ; |
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P_LDL PB_RX_ON
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BR SaveEncState
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;-------------------------------------------------------------------------------
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; Enable transmitter, transmit the S-field and the first 61 bits of the D-field
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; (93 bits total)
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;
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Transmit: P_LDH 0x00 ;
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WT 40 ;
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B_RST ;
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B_RC BMC_CTRL ;
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WNT 1 ; Wait until beginning of slot
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B_ST 0x00 ; Start transmission of S-field data |
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WT 1 ; Wait one bit | p: -8 S: 0
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P_LDH PB_TX_ON ; Enable transmitter | p: -7 S: 1
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WT 37 ; Transmit 29 bits S-field | p: -6-30 S: 2-38
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B_AT2 SD_A_FIELD_OFF ; Start transission of A-field data/A-field CRC | p: 31 S: 39
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WT 62 ; Transmit first 61 bits of A-field | p: 32-92 A: 0-60
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RTN ; Return | p: 93 A: 61
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;-------------------------------------------------------------------------------
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;
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;
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TX_P32U_BZ: WT 249 ; | p: 97-345 B: 1-249
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WT 84 ; Last bits of B-field data | p: 346-415 B: 250-319
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; X-field | p: 416-419 B: 320-323 X: 0-3
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; Z-field (?) | p: 420-424 Z: 0- 3
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; 5 bits of crap? | p: 425-429
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B_RST ; Reset BMC | p: 430
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TransmitEnd: P_LDL PB_TX_ON ; Disable transmitter |
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WT 8 ; Wait until transmitter is disabled |
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P_LDL 0x00 ;
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BR SaveEncState
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;-------------------------------------------------------------------------------
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RFInit: RFEN ; Enable RF-clock
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WT 2
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MEN1N ; Transfer first radio configuration word
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M_WR RF_DESC
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WT U2785_CFG1_LEN + 1
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M_RST
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MEN1
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MEN1N ; Transfer second radio configuration word
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M_WR RF_DESC + U2785_CFG1_LEN / 8
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WT U2785_CFG2_LEN + 1
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M_RST
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MEN1
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;WT 1
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P_LDL 0x20
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WT 10
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IFNDEF ENABLE_P64
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MEN2
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WT 182
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MEN2N
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WT 16
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ENDIF
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RTN
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;--------------------------------------------------------------
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;
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LoadEncKey: D_RST
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D_LDK DCS_DESC ; load IV (64 bits) and cipher key (64 bits)
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WT 16
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D_LDK 0
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D_PREP 0
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WT 39
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D_PREP 0
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RTN
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SaveEncState: D_WRS DCS_STATE
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WT DCS_STATE_SIZE ; actually should be -1, but does not work
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D_WRS 0
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D_RST
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RTN
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LoadEncState: D_RST
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D_LDS DCS_STATE
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WT DCS_STATE_SIZE ; actually should be -1, but does not work
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D_LDS 0
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RTN
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;-------------------------------------------------------------
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SyncInit: BK_C BANK1_LOW
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Sync: JMP RFInit
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WT 250
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P_SC PSC_S_SYNC_ON
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P_LDH PB_RX_ON | PB_DCTHRESHOLD
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UNLCK
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WT 64
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B_XOFF
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B_SR
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WNT 20
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JMP1 SFieldFound
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B_RST
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U_INT1
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WNT 23
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BR Sync
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;-------------------------------------------------------------
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SFieldFound: WNT 23
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P_SC 0x00
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SyncLock: JMP RFInit
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JMP RX_P00
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U_INT0
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WNT 22
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SyncLoop: BR Sync
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;-------------------------------------------------------------
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InitDIP: ;B_RST
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BK_C BANK0_LOW
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C_LD DIP_CC_INIT
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WT 10
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;B_RC BMC_CTRL
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;WT BMC_CTRL_SIZE + 1
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;B_RST
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C_ON
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WT 10
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P_EN
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P_LD 0x04
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RCK_INT
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RFEN
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RFStart: BR SyncInit
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;-------------------------------------------------------------
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SHARED DIP_CC_INIT,RF_DESC
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SHARED BMC_CTRL,BMC_CTRL_MFR_OFF
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SHARED SD_RSSI_OFF,SD_CSUM_OFF,SD_PREAMBLE_OFF,SD_DATA_OFF
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SHARED SlotTable
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SHARED Slot00,Slot01,Slot02,Slot03,Slot04,Slot05,Slot06,Slot07
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SHARED Slot08,Slot09,Slot10,Slot11,Slot12,Slot13,Slot14,Slot15
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SHARED Slot16,Slot17,Slot18,Slot19,Slot20,Slot21,Slot22,Slot23
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SHARED RFStart,RFInit
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SHARED SyncInit,Sync,SyncLock,SyncLoop
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SHARED ClockSyncOn,ClockSyncOff,ClockAdjust
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SHARED PSC_ARPD1,PSC_S_SYNC,PSC_S_SYNC_ON,PSC_EOPSM
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SHARED RX_P00,RX_P00_Sync,RX_P32U,RX_P32U_Enc,RX_P640j,RX_P640j_Enc
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SHARED TX_P00,TX_P32U,TX_P32U_Enc,TX_P640j,TX_P640j_Enc
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SHARED DCS_IV,DCS_CK,DCS_STATE,DCS_STATE_SIZE
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SHARED LoadEncKey,LoadEncState
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