It's plain wrong for PCMCIA to select HAVE_IDE that implies e.g. the
availability of an asm/ide.h
It turns out this was done for ARM, and we can simply always select
HAVE_IDE on ARM instead of manually tracking which platforms might
possible have an IDE controller directly or indirectly.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Cc: Russell King <rmk+lkml@arm.linux.org.uk>
Cc: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
The 64-bit vDSO image is in a special ".vdso" section for no reason
I can determine. Furthermore, the location of the vdso_end symbol
includes some wrongly-calculated padding space in the image, which
is then (correctly) rounded to page size, resulting in an extra page
of zeros in the image mapped in to user processes.
This changes it to put the vdso.so image into normal initdata as we
have always done for the 32-bit vDSO images. The extra padding is
gone, so the user VMA is one page instead of two. The image that
was already copied around at boot time is now in initdata, so we
recover that wasted space after boot.
Signed-off-by: Roland McGrath <roland@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
We checked the hardware freq with OS cached freq value in get_cur_freqon_cpu().
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Dave Jones <davej@redhat.com>
This bug was introduced in the 2.6.24 i386/x86_64 tree merge, where
MSI-X vector allocation will eventually fail. The cause is the new
bit array tracking used vectors is not getting cleared properly on
IRQ destruction on the 32-bit APIC code.
This can be seen easily using the ixgbe 10 GbE driver on multi-core
systems by simply loading and unloading the driver a few times.
Depending on the number of available vectors on the host system, the
MSI-X allocation will eventually fail, and the driver will only be
able to use legacy interrupts.
I am generating the same patch for both stable trees for 2.6.24 and
2.6.25.
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* EXTRA_CFLAGS do not apply for *.S
* don't bother with symlinks to ../lib/mem*.S, just add ../lib/mem*.o
to object list
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Since both the IDE interface and SMC 91C111 Ethernet chip are on-board
devices, not SOC devices, move the platform device registration form the
common to the board specific code.
While at it, remove semicolon (which didn't break compilation only by
chance) from the AU1XXX_ATA_DDMA_REQ macro and do some renaming:
- change 'au1200_ide0_' variable name prefix to the mere 'ide_';
- change 'smc91x_' variable name prefix to 'smc91c111_' since that's the
name of the chip used on the boards;
- drop 'AU1XXX_' prefix from the names of macros describing IDE and Ethernet
on-board devices;
- change 'SMC91111_' to 'SMC91C111_', change 'IRQ' to 'INT' in the names of
the macros describing the Ethernet chip for consistency with the IDE
macros;
- change 'ATA_' to 'IDE_' and 'OFFSET' to 'SHIFT' (since this value is
indeed a shift count) in the names of the macros describing the IDE
interface.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Pb1200 does have SMC 91C111 Ethernet chip on board but the platform code
did not register it, so one couldn't mount NFS...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The on-board SMC 91C111 chip only decodes 16 bytes of memory (obviously, it
can not decode a whole megabyte starting from address 0x19000300).
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Do not initialize res->parent for platform device.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Do not use non-standard I/O accessors, such as reg_rd08, etc.
* Kill unnecessary wbflush()
* Kill tx4938_mips.h
* Kill unnecessary includes
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This is a board-independent TXx9 gpio API implementation using gpiolib.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch unexports the null_perf_irq() symbol, and simultaneously
makes this function static.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
No users for the rtc_mips_set_time() routine exist outside of the
core kernel code. Therefore, EXPORT_SYMBOL(rtc_mips_set_time) is
useless, and this patch removes it.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
No users for the copy_from_user_page() routine exist outside of the
core kernel code. Therefore, EXPORT_SYMBOL(copy_from_user_page) is
useless, and this patch removes it.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The copy_to_user_page() function is called only in the core kernel
code. Therefore, there is no need to export it. This patch removes
EXPORT_SYMBOL(copy_to_user_page).
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The copy_user_highpage() routine has no users outside of the
core kernel code, so exporting this symbol is pointless.
This patch removes EXPORT_SYMBOL(copy_user_highpage).
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Move the code registering the Alchemy UART platform devices from
drivers/serial/ to its proper place, into the Alchemy platform code. Fix
the related Kconfig entry, while at it...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Go thru the Alchemy code and hunt down every unneeded #include, #define, and
extern (some of which refer to already long dead functions).
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The following variables defined in arch/mips/mips-boards/malta/malta_int.c
can become static: msc_irqmap[], msc_nr_irqs, msc_eicirqmap[], and
msc_nr_eicirqs. This patch makes them static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The array standard_io_resources[] needs not to be exposed in the kernel
global namespace. This patch makes it static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
There is no need for the plat_perf_setup() function to be global,
so make it static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Neither the mdesc[] array nor the prom_getmdesc() function need to
be global. This patch makes them static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This change makes the needlessly global function mips_ejtag_setup() static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This change makes the needlessly global function mips_nmi_setup() static.
Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.
Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Since the commit 91a2fcc886 ([MIPS]
Consolidate all variants of MIPS cp0 timer interrupt handlers) removed the
Alchemy specific timer handler, 'r4k_offset' and 'r4k_cur' variables became
practically useless, so get rid of them at last, renaming cal_r4off()
function into calc_clock() and making it return CPU frequency. Also, make
'no_au1xxx_32khz' variable static...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Defer the unmasking of the count/compare interrupt (IRQ5) till the
clockevent driver initialization:
- only enable the cascaded IRQs 0 thru 4 in arch_init_irq(); kill the
ALLINTS macro -- this change is blessed by AMD as I saw it in their own
patch; :-)
- do not force IRQ5 enabled in plat_time_init() if PM is enabled and there's
no 32 KHz crystal.
Update the copyrights (taking into account my prior changes), also removing
Pete Popov's old email...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Slightly tacky, but there is a precedent in the sparc archirecture code.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
It is not being used by Malta and shouldn't be needed for MIPSsim.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Fold the SB-1 specific implementation of clear_page/copy_page in the
generic version, and rewrite that one in tlbex style. The immediate
benefits:
- It converts the compile-time workaround for SB-1 pass 1 prefetches
to a more efficient run-time check.
- It allows adjustment of loop unfolling, which helps to reduce the
number of redundant cdex cache ops.
- It fixes some esoteric cornercases (the cache line length calculations
can go wrong, and support for 64k pages without prefetch instructions
will overflow the addiu immediate).
- Somewhat better guesses of "good" prefetch values.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
