Update the clock settings on resume for suspend/resume
support so that if the boot loader changes anything or
the system's PLL is reset then we return with the correct
settings.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We cannot sleep if we have cpufreq pm enabled during some
of the clock operations, so change to use a spinlock to
protect the clock system.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the PLL calculation code into it's own header
file for re-use with the other plat-s3c24xx based
systems such as the S3C24A0.
Note, we change the name of s3c2410_get_pll to the
more generically named s3c24xx_get_pll as well as
the related defintions.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Only certain boards need these clocks, and they are not
available on some CPUs (such as the S3C24A0) so remove
them from arch/arm/plat-s3c24xx/clock.c and into their
own file with appropriate Kconfig entries.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We need to add plat-s3c to the build to get the headers
that will go in here once moved from include/asm-arm so
we may as well put some useful common s3c code in here
to stop the errors generated form having nothing built.
The cpu setup is now passed the cpu idcode and the table
of supported cpus to s3c_init_cpu() to abstract the
cpu identification out of the initial io setup.
As well as moving the cpu initialisation code, we move the
map of the board specific items up to the calling code as
none of the map_io() functions actually do anything other
than pass this to iotable_init().
This patch does not rename any of the init functions that
will be common to s3c24xx and any other s3c architectures
as this can be done at a later date as it will touch all
the board support files which use functions such as
s3c24xx_init_clocks() and s3c24xx_init_uarts().
Note, the header arch/arm/plat-s3c24xx/include/plat/cpu.h
still has functions that are used by both the cpu and
board initialisation functions. This means that each board
has definitions specific to the cpu support included and
the vice-versa.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a default header for <mach/io.h> for systems
such as the S3C24A0 which do not need any of the
complex code that the S3C2410 uses.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
vmalloc.h is common across all the current s3c platforms,
so move it to arch/arm/plat-s3c/include/mach to be used
for all the targets.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move <mach/timex.h> to arch/arm/plat-s3c/include/mach/timex.h
so it can be the default for all S3C based architectures.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the S3C2410 base clock list to arch/arm/plat-s3c24xx
as this code is common to the S3C2410, S3C2440 and S3C2442
cpus.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This is the header file that defines the basic cpu frequency
scalling support for the Samsung S3C series of SoC.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a set of default pin configuration routines for
setting up the SPI gpio configuration when using the
hardware SPI driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
drivers/built-in.o: In function `pci_set_consistent_dma_mask':
hid-quirks.c:(.text+0x2664): multiple definition of `pci_set_consistent_dma_mask'
drivers/built-in.o: In function `pci_set_dma_mask':
hid-quirks.c:(.text+0x42c4): multiple definition of `pci_set_dma_mask'
because drivers/pci/pci.c was not seeing the definition disabling these
functions.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Include <linux/i2c.h> in all ep93xx platforms.
Patch "5311/1: add core support for built in i2c bus" will cause build errors due to the following in
arch/arm/mach-ep93xx/include/mach/platform.h:
+void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
The i2c.h header needs to be included in order to define struct i2c_board_info.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use EP93XX_*_PHYS_BASE and SZ_* defines in ep93xx platform inits.
The following patch changes the flash memory hard-coded resource
addresses and MACHINE_START boot_params to EP93XX_*_PHYS_BASE and
SZ_* defines to improve readability. Also some minor whitespace
cleanup resulting from previous patches.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The gpio setup for AM200 specific GPIO pins should be done in the AM200
code rather than in generic gumstix code.
Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
dma_supported() is supposed to indicate whether the system can support
the DMA mask it was passed, which depends on the maximal address which
can be returned for DMA allocations. If the mask is smaller than that,
we are unable to guarantee that the driver can reliably obtain suitable
memory.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Netwinder was using gpio_xxx names which could clash with the GPIO
layer. Add a 'nw_' prefix to ensure that these remain separate.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Compilation for the Feroceon core should use -mtune=marvell-f. This is
available in Code Sourcery's 2008Q3 release at the moment. Otherwise
fall back to -mtune-=xscale.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
On newer versions of the RD88F6281 board, the WAN port is connected to
its own ethernet port on the CPU, via a separate PHY, whereas on older
versions of the board, it is connected to one of the PHYs in the
ethernet switch. In the RD8F6281 setup code, detect which version of
the board we are running on, and instantiate the ethernet ports and
switch driver accordingly.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
The 88f6192 and 88f6281 Kirkwood SoCs support two ethernet ports.
Add the platform glue that will allow board support files to
instantiate the second ethernet port.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
The 88F5182 found in the DNS-323 rev B1 (and some other devices, such
as the CH3SNAS) require different initialisation of the SATA
controller and MPP registers.
Tested on a DNS-323 rev B1.
Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
Based on similar code from the tsx09 series of machines, just rips the MAC
address out of flash and stuffs it into the NIC. Tested on a DNS323 rev B1.
It's possible (though unlikely) that an A1 will have the MAC in a different
location in flash.
Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
The Orion ehci driver serves the Orion, kirkwood and DD Soc families.
Since each of those integrate a different USB phy we should have the
ability to use few initialization sequences or to leave the boot loader
phy settings as is.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Add Nuvoton W90X900 ARM9 plat support to linux arm tree,
Now, this patch include only W90P910 EVB of W90P910 CPU,
Its driver is nothing.
Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds HP iPAQ h5000's (h5400, h5500) basic definitions.
Kernel will able to boot, work via serial console, mount filesystems
placed on flashes and run USB gadgets (g_ether by default).
Other device drivers (frame buffer, LCD, touchscreen, backlight,
bluetooth, w1/battery, ...) are depend on SAMCOP and MediaQ
SoCs/MFDs, drivers to which will be submitted too, after massive
cleanups.
This machine will be used as "real user" for these new drivers.
This is an updated version of the patch, which contains fixes proposed on
linux-arm-kernel mailing list.
Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: Milan Plzik <milan.plzik@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add mapping for system ROM using physmap-flash mapping.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add mapping for system ROM using physmap-flash mapping.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add mapping for system ROM using physmap-flash mapping.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add mapping for system ROM using physmap-flash mapping.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add platform data necessary to support tmiofb on tosa.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Take advantage of the newly created wm97xx battery driver
and remove useless code in mioa701 board code. Add also the
ac connection detect capability after the matching gpio was
discovered.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
The charger enable gpio is straight (1 means draw from USB
Vbus, 0 mean do not draw). The USB Vbus sensing is inverted
(1 means no Vbus voltage sensed, 0 means Vbus voltage
present).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Change the halt and reboot method from gpio based to "jump
to ROM IPL beginning". This gives control back to IPL, which
without PowerOn key pressed, will put the device into deep
sleep until PowerOn is pressed for 1 second.
But this has the benefit of keeping the RTC registers across
reboots, which is good for OS change.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add GPIO configuration and platform specific declarations
to make Mitac Mio A701 camera chip work. The chip is a
Micron MT9M111 CMOS sensor, based on PXA QIF interface and
I2C bus for sensor control.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Since mioa701 board has migrated to the mfp architecture,
low power gpio setup is now correctly handled even when gpio
led driver is not loaded, and leds and vibrator don't stay
activated in suspend mode (especially vibrator).
Remove the not needed anymore dependency.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add IO memory and IRQ ressources for pxa based SoC to be
able to use the new rtc-pxa driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This patch implements Eric Miao's idea to detect the correct value of
sdram_rows by inspecting the MDCNFG register settings.
It is only tested on two pxa27x devices with 64MB RAM (magician and
hx4700) so far.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Following the removal of the "->policy" usage for PXA255 in patch
459fc208ab (cpufreq: remove
policy->governor setting in drivers initialization), this patch
introduces an option (called "pxa255_turbo_table") to select either
the "run" or "turbo" frequency table.
It also cures the runtime warning that was printed each time the
frequency was changed.
Got rid of all references to CPUFREQ_POLICY_* for pxa255, and sticked
with the run/turbo thing.
Tested on an Arcom/Eurotech Viper.
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This symbol is required by locomo backlight driver, exporting this
allows the driver to be built as a module.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
GPIO3/GPIO4 are a bit special on pxa27x, since it depends on PCFR/PI2C_EN
bit, add their definitions here with comments.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Stefan Schmidt <stefan@datenfreihafen.org>
PXA935 has changed its implementor ID from Intel to Marvell, this
patch modifies arch/arm/boot/compressed/head.S and proc-xsc3.S to
support a smooth bootup.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Let's put these devices into a central place even if they are now
processor specific, as they might be re-used in later processors.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
