4 commits

Author	SHA1	Message	Date
Wu Zhangjin	b8853aa3d9	MIPS: Loongson: update cpu-feature-overrides.h ... Loongson doesn't support MIPSR2, therefore, MIPSR2 vectored interrupts (cpu_has_vint) and MIPSR2 external interrupt controller mode (cpu_has_veic) are 0. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1112/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2010-05-21 21:31:14 +01:00
Wu Zhangjin	f7a904dffe	MIPS: Loongson: Change the Email address of Wu Zhangjin ... Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/829/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2010-02-27 12:53:12 +01:00
Zhang Le	e8d4c342e5	MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store ... Loongson 2 does not have dcache aliases when is using 16k pages. and the And because Loongson 2 doesn't do SMP , cpu_icache_snoops_remote_store does not matter here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2009-11-02 12:00:07 +01:00
Wu Zhangjin	8e4971175a	MIPS: Loongson: Change naming methods ... To make source code of loongson sharable to the machines(such as gdium) made by the other companies, we rename arch/mips/lemote to arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to FULOONG2E to make it distinguishable to the future FULOONG2F. and also, some other relative tuning is needed. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2009-09-17 20:07:47 +02:00

Renamed from arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h (Browse further)