Adds binding documentation for cache sram for the PQ3 and some QorIQ
based platforms.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Define the binding for compatible = "fsl,mpic", including the definition
of 4-cell interrupt specifiers. The 3rd and 4th cells are needed to
define additional types of interrupt source outside the "normal" external
and internal interrupts in FSL SoCs. Define error interrupt, IPIs, and
PIC timer sources.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Now handles multiple ranges, doesn't make assumptions about interrupt
specifier format, and doesn't claim interrupts that don't correspond to an
available range.
Also has some better error checking.
The device tree binding is updated to clarify some existing assumptions.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Advertise the possibility to use this driver with device tree if
CONFIG_OF is set.
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
With the recent switch of the (currently still out-of-tree) Nios2 Linux
port to devicetree we want to be able to retrieve the resources and
properties from dts.
The old method to retrieve resources and properties from platform data
is still supported.
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Until "x86: dt: Cleanup local apic setup" we read the local apic
address from the MSR and ignored the entry in DT. Reflect this change
in the documentation.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
LKML-Reference: <1298830419-22681-1-git-send-email-bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This allows to load the OF driver based informations from the device
tree. Systems without BIOS may need to perform some initialization.
PowerPC creates a PNP device from the OF information and performs this
kind of initialization in their private PCI quirk. This looks more
generic.
This patch also avoids registering the platform RTC driver on X86 if
we have a device tree blob. Otherwise we would setup the device based
on the hardcoded information in arch/x86 rather than the device tree
based one.
[ tglx: Changed "int of_have_populated_dt()" to bool as recommended by
Grant ]
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: sodaville@linutronix.de
Cc: devicetree-discuss@lists.ozlabs.org
Cc: rtc-linux@googlegroups.com
Cc: Alessandro Zummo <a.zummo@towertech.it>
LKML-Reference: <1298405266-1624-12-git-send-email-bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
History:
v1..v2:
- dropped device_type except for cpu & pci. I have the compatible string
for pci so I can drop the device_type once it is possible
- I lowercased all compatible types. I will need to resend some patches
which have upper case intel
- The cpu had the same compatible string as the soc node. So I added to
the soc node -immr for internel memory mapped registers.
- I added generic names for all parts.
- I reworked the i2c bars matching the way you suggested. I added a
compatible node for the PCI device which only the PCI ids in its
compatible string. The bars (each represents a complete i2c
controller) have a "intel,ce4100-i2c-controller" compatible node. It
is not used by the driver.
The driver is probed via PCI ids (by the pci subsystem not OF) and
matches the bar address against the ressource in the child node. Once
there is a hit the node is attached.
- The SPI driver is also probed via pci. However I also attached a
compatible property based on PCI ids
v2..v3:
- intel,ce4100-immr become intel,ce4100-cp. cp stands for core
peripherals. The Atom data sheet talks here about ACPI devices. Since
we don't have ACPI this does not apply here.
- The interrupt map is gone. There are now plenty of device nodes.
- The "unit address string" got fixed, it uses not DD,V format.
v3..v4:
- added descriptions for compatible nodes introduced here:
- intel,ce4100-ioapic
- intel,ce4100-lapic
- intel,ce4100-hpet
- intel,ce4100
- intel,ce4100-cp
- intel,ce4100-pci
- added a description about I2C controller magic.
- Added gpio-controller and gpio-cells property to gpio devices. Those
properties are not (yet) used.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: sodaville@linutronix.de
Cc: devicetree-discuss@lists.ozlabs.org
LKML-Reference: <1298405266-1624-4-git-send-email-bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This patch adds a new SPI driver to support the Altera SOPC Builder
SPI component. It uses the bitbanging library.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch adds support of OpenCores tiny SPI driver.
http://opencores.org/project,tiny_spi
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The device tree is used by more than just PowerPC. Make the documentation
directory available to all.
v2: reorganized files while moving to create arch and driver specific
directories.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Linus Torvalds