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Author SHA1 Message Date
Yinghai Lu 199751d715 x86: make 32 bit to use sparse_irq
but actually irq still needs to be less than NR_IRQS, because
interrupt[NR_IRQS] in entry.S.

need to enable per_cpu vector...

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-10-16 16:52:53 +02:00
Yinghai Lu 0799e432ac x86: use nr_irqs
also add first_free_entry and pin_map_size, which were NR_IRQS derived
constants.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-10-16 16:52:05 +02:00
Cyrill Gorcunov 2ae111cdd8 x86: apic interrupts - move assignments to irqinit_32.c, v2
64bit mode APIC interrupt handlers are set within irqinit_64.c.
Lets do tha same for 32bit mode which would help in furter code merging.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-08-11 16:43:09 +02:00
Thomas Gleixner f20b11e716 x86: rename the i8259_32/64.c leftovers to initirq_32/64.c
The leftovers of the i8259 unification have nothing to do with i8259
at all. They contain interrupt init code and the i8259_xx name is just
misleading now.

Rename them to initirq_32/64.c

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-05-24 15:59:58 +02:00