RDMA/cxgb4: Do CIDX_INC updates every 1/16 CQ depth CQE reaps
This avoids the CIDX_INC overflow issue with T4A2 when running kernel RDMA applications. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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1 changed files with 7 additions and 1 deletions
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@ -507,8 +507,14 @@ static inline void t4_swcq_consume(struct t4_cq *cq)
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static inline void t4_hwcq_consume(struct t4_cq *cq)
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static inline void t4_hwcq_consume(struct t4_cq *cq)
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{
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{
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cq->bits_type_ts = cq->queue[cq->cidx].bits_type_ts;
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cq->bits_type_ts = cq->queue[cq->cidx].bits_type_ts;
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if (++cq->cidx_inc == cq->size)
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if (++cq->cidx_inc == (cq->size >> 4)) {
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u32 val;
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val = SEINTARM(0) | CIDXINC(cq->cidx_inc) | TIMERREG(7) |
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INGRESSQID(cq->cqid);
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writel(val, cq->gts);
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cq->cidx_inc = 0;
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cq->cidx_inc = 0;
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}
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if (++cq->cidx == cq->size) {
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if (++cq->cidx == cq->size) {
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cq->cidx = 0;
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cq->cidx = 0;
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cq->gen ^= 1;
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cq->gen ^= 1;
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