solos: Clean up firmware loading code
We no longer try to load firmware while the ATM is up and running. However, this means that we _do_ make init_module() wait for it, and it takes a long time for now (since we're using ultra-conservative code in the FPGA for that too). The inner loop which uses swahb32p() was by Simon Farnsworth. Simon has patches which migrate us to request_firmware_nowait(), for which we'll actually need to take down the ATM devices, do the upgrade, then reregister them. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
David Woodhouse
parent
7c4015bdff
commit
fa755b9f2b
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@ -93,7 +93,7 @@ struct solos_card {
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spinlock_t cli_queue_lock;
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struct sk_buff_head tx_queue[4];
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struct sk_buff_head cli_queue[4];
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int flash_chip;
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wait_queue_head_t fw_wq;
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};
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#define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
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@ -112,11 +112,7 @@ module_param(firmware_upgrade, int, 0444);
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module_param(fpga_upgrade, int, 0444);
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static int opens;
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static struct firmware *fw;
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static int flash_offset;
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void flash_upgrade(struct solos_card *);
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void flash_write(struct solos_card *);
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static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
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struct atm_vcc *vcc);
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static int fpga_tx(struct solos_card *);
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@ -202,129 +198,73 @@ static ssize_t console_store(struct device *dev, struct device_attribute *attr,
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static DEVICE_ATTR(console, 0644, console_show, console_store);
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void flash_upgrade(struct solos_card *card){
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static int flash_upgrade(struct solos_card *card, int chip)
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{
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const struct firmware *fw;
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const char *fw_name;
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uint32_t data32 = 0;
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int blocksize = 0;
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int numblocks = 0;
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dev_info(&card->dev->dev, "Flash upgrade started\n");
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if (card->flash_chip == 0) {
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if (request_firmware((const struct firmware **)&fw,
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"solos-FPGA.bin",&card->dev->dev))
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{
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dev_info(&card->dev->dev,
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"Failed to find firmware\n");
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return;
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}
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int offset;
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if (chip == 0) {
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fw_name = "solos-FPGA.bin";
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blocksize = FPGA_BLOCK;
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} else {
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if (request_firmware((const struct firmware **)&fw,
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"solos-Firmware.bin",&card->dev->dev))
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{
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dev_info(&card->dev->dev,
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"Failed to find firmware\n");
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return;
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}
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fw_name = "solos-Firmware.bin";
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blocksize = SOLOS_BLOCK;
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}
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numblocks = fw->size/blocksize;
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dev_info(&card->dev->dev, "Firmware size: %d\n", fw->size);
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if (request_firmware(&fw, fw_name, &card->dev->dev))
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return -ENOENT;
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dev_info(&card->dev->dev, "Flash upgrade starting\n");
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numblocks = fw->size / blocksize;
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dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
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dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
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dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
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iowrite32(1, card->config_regs + FPGA_MODE);
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data32 = ioread32(card->config_regs + FPGA_MODE);
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/*Set mode to Chip Erase*/
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if (card->flash_chip == 0) {
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dev_info(&card->dev->dev,
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"Set FPGA Flash mode to FPGA Chip Erase\n");
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} else {
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dev_info(&card->dev->dev,
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"Set FPGA Flash mode to Solos Chip Erase\n");
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}
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iowrite32((card->flash_chip * 2), card->config_regs + FLASH_MODE);
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flash_offset = 0;
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/* Set mode to Chip Erase */
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dev_info(&card->dev->dev, "Set FPGA Flash mode to %s Chip Erase\n",
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chip?"Solos":"FPGA");
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iowrite32((chip * 2), card->config_regs + FLASH_MODE);
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iowrite32(1, card->config_regs + WRITE_FLASH);
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return;
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}
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wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
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void flash_write(struct solos_card *card){
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int block;
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int block_num;
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int blocksize;
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int i;
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uint32_t data32 = 0;
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for (offset = 0; offset < fw->size; offset += blocksize) {
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int i;
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/*Clear write flag*/
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iowrite32(0, card->config_regs + WRITE_FLASH);
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/*Set mode to Block Write*/
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/*dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n");*/
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iowrite32(((card->flash_chip * 2) + 1), card->config_regs + FLASH_MODE);
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/*When finished programming flash, release firmware and exit*/
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if (fw->size - flash_offset == 0) {
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//release_firmware(fw); /* This crashes for some reason */
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/* Clear write flag */
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iowrite32(0, card->config_regs + WRITE_FLASH);
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iowrite32(0, card->config_regs + FPGA_MODE);
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iowrite32(0, card->config_regs + FLASH_MODE);
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dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
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return;
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}
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if (card->flash_chip == 0) {
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blocksize = FPGA_BLOCK;
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} else {
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blocksize = SOLOS_BLOCK;
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}
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/*Calculate block size*/
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if ((fw->size - flash_offset) > blocksize) {
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block = blocksize;
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} else {
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block = fw->size - flash_offset;
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}
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block_num = flash_offset / blocksize;
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//dev_info(&card->dev->dev, "block %d/%d\n",block_num + 1,(fw->size/512/8));
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/*Copy block into RAM*/
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for(i=0;i<block;i++){
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if(i%4 == 0){
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//dev_info(&card->dev->dev, "i: %d\n", i);
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data32=0x00000000;
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}
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switch(i%4){
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case 0:
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data32 |= 0x0000FF00 &
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(*(fw->data + i + flash_offset) << 8);
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break;
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case 1:
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data32 |= 0x000000FF & *(fw->data + i + flash_offset);
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break;
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case 2:
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data32 |= 0xFF000000 &
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(*(fw->data + i + flash_offset) << 24);
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break;
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case 3:
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data32 |= 0x00FF0000 &
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(*(fw->data + i + flash_offset) << 16);
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break;
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/* Set mode to Block Write */
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/* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
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iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
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/* Copy block to buffer, swapping each 16 bits */
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for(i = 0; i < blocksize; i += 4) {
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uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
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iowrite32(word, RX_BUF(card, 3) + i);
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}
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if (i%4 == 3) {
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iowrite32(data32, RX_BUF(card, 3) + i - 3);
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}
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}
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i--;
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if (i%4 != 3) {
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iowrite32(data32, RX_BUF(card, 3) + i - (i%4));
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/* Specify block number and then trigger flash write */
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iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
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iowrite32(1, card->config_regs + WRITE_FLASH);
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wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
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}
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/*Specify block number and then trigger flash write*/
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iowrite32(block_num, card->config_regs + FLASH_BLOCK);
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iowrite32(1, card->config_regs + WRITE_FLASH);
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// iowrite32(0, card->config_regs + WRITE_FLASH);
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flash_offset += block;
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return;
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release_firmware(fw);
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iowrite32(0, card->config_regs + WRITE_FLASH);
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iowrite32(0, card->config_regs + FPGA_MODE);
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iowrite32(0, card->config_regs + FLASH_MODE);
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dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
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return 0;
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}
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static irqreturn_t solos_irq(int irq, void *dev_id)
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@ -337,10 +277,10 @@ static irqreturn_t solos_irq(int irq, void *dev_id)
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//Disable IRQs from FPGA
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iowrite32(0, card->config_regs + IRQ_EN_ADDR);
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/* If we only do it when the device is open, we lose console
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messages */
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if (1 || opens)
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if (card->atmdev[0])
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tasklet_schedule(&card->tlet);
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else
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wake_up(&card->fw_wq);
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//Enable IRQs from FPGA
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iowrite32(1, card->config_regs + IRQ_EN_ADDR);
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@ -354,17 +294,6 @@ void solos_bh(unsigned long card_arg)
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uint32_t card_flags;
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uint32_t tx_mask;
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uint32_t rx_done = 0;
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uint32_t data32;
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data32 = ioread32(card->config_regs + FPGA_MODE);
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if (data32 != 0) {
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data32 = ioread32(card->config_regs + FLASH_BUSY);
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if (data32 == 0) {
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flash_write(card);
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}
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return;
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}
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card_flags = ioread32(card->config_regs + FLAGS_ADDR);
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@ -749,6 +678,7 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
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return -ENOMEM;
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card->dev = dev;
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init_waitqueue_head(&card->fw_wq);
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err = pci_enable_device(dev);
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if (err) {
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@ -794,15 +724,13 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
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card->nr_ports = 2; /* FIXME: Detect daughterboard */
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err = atm_init(card);
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if (err)
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goto out_unmap_both;
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pci_set_drvdata(dev, card);
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tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
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spin_lock_init(&card->tx_lock);
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spin_lock_init(&card->tx_queue_lock);
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spin_lock_init(&card->cli_queue_lock);
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/*
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// Set Loopback mode
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data32 = 0x00010000;
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@ -832,24 +760,33 @@ static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
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//dev_dbg(&card->dev->dev, "Requesting IRQ: %d\n",dev->irq);
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err = request_irq(dev->irq, solos_irq, IRQF_DISABLED|IRQF_SHARED,
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"solos-pci", card);
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if (err)
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if (err) {
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dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
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goto out_unmap_both;
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}
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// Enable IRQs
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iowrite32(1, card->config_regs + IRQ_EN_ADDR);
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if(firmware_upgrade != 0){
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card->flash_chip = 1;
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flash_upgrade(card);
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} else {
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if(fpga_upgrade != 0){
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card->flash_chip = 0;
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flash_upgrade(card);
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}
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}
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if (fpga_upgrade)
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flash_upgrade(card, 0);
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if (firmware_upgrade)
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flash_upgrade(card, 1);
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err = atm_init(card);
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if (err)
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goto out_free_irq;
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return 0;
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out_free_irq:
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iowrite32(0, card->config_regs + IRQ_EN_ADDR);
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free_irq(dev->irq, card);
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tasklet_kill(&card->tlet);
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out_unmap_both:
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pci_set_drvdata(dev, NULL);
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pci_iounmap(dev, card->config_regs);
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out_unmap_config:
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pci_iounmap(dev, card->buffers);
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