ath9k_hw: Add carrier leak correction in desired gain calculation
Cc: muddin@qca.qualcomm.com Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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2 changed files with 27 additions and 10 deletions
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@ -246,13 +246,13 @@ static void ar9003_paprd_get_gain_table(struct ath_hw *ah)
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static unsigned int ar9003_get_desired_gain(struct ath_hw *ah, int chain,
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int target_power)
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{
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int olpc_gain_delta = 0;
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int olpc_gain_delta = 0, cl_gain_mod;
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int alpha_therm, alpha_volt;
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int therm_cal_value, volt_cal_value;
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int therm_value, volt_value;
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int thermal_gain_corr, voltage_gain_corr;
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int desired_scale, desired_gain = 0;
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u32 reg;
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u32 reg_olpc = 0, reg_cl_gain = 0;
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REG_CLR_BIT(ah, AR_PHY_PAPRD_TRAINER_STAT1,
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AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_TRAIN_DONE);
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@ -271,15 +271,29 @@ static unsigned int ar9003_get_desired_gain(struct ath_hw *ah, int chain,
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volt_value = REG_READ_FIELD(ah, AR_PHY_BB_THERM_ADC_4,
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AR_PHY_BB_THERM_ADC_4_LATEST_VOLT_VALUE);
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if (chain == 0)
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reg = AR_PHY_TPC_11_B0;
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else if (chain == 1)
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reg = AR_PHY_TPC_11_B1;
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else
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reg = AR_PHY_TPC_11_B2;
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switch (chain) {
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case 0:
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reg_olpc = AR_PHY_TPC_11_B0;
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reg_cl_gain = AR_PHY_CL_TAB_0;
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break;
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case 1:
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reg_olpc = AR_PHY_TPC_11_B1;
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reg_cl_gain = AR_PHY_CL_TAB_1;
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break;
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case 2:
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reg_olpc = AR_PHY_TPC_11_B2;
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reg_cl_gain = AR_PHY_CL_TAB_2;
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break;
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default:
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ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
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"Invalid chainmask: %d\n", chain);
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break;
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}
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olpc_gain_delta = REG_READ_FIELD(ah, reg,
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olpc_gain_delta = REG_READ_FIELD(ah, reg_olpc,
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AR_PHY_TPC_11_OLPC_GAIN_DELTA);
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cl_gain_mod = REG_READ_FIELD(ah, reg_cl_gain,
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AR_PHY_CL_TAB_CL_GAIN_MOD);
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if (olpc_gain_delta >= 128)
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olpc_gain_delta = olpc_gain_delta - 256;
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@ -289,7 +303,7 @@ static unsigned int ar9003_get_desired_gain(struct ath_hw *ah, int chain,
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voltage_gain_corr = (alpha_volt * (volt_value - volt_cal_value) +
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(128 / 2)) / 128;
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desired_gain = target_power - olpc_gain_delta - thermal_gain_corr -
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voltage_gain_corr + desired_scale;
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voltage_gain_corr + desired_scale + cl_gain_mod;
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return desired_gain;
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}
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@ -1121,6 +1121,9 @@
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#define AR_PHY_POWERTX_RATE8_POWERTXHT40_5 0x3F00
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#define AR_PHY_POWERTX_RATE8_POWERTXHT40_5_S 8
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#define AR_PHY_CL_TAB_CL_GAIN_MOD 0x1f
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#define AR_PHY_CL_TAB_CL_GAIN_MOD_S 0
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void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx);
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#endif /* AR9003_PHY_H */
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