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Staging: et131x: fix most coding style issues in et131x

This is a patch to the et131x driver that fixes up almost all coding
style issues

Signed-off-by: Michael Sprecher <sprecher.m@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Michael Sprecher 2010-03-10 13:15:35 +01:00 committed by Greg Kroah-Hartman
parent 67a7b3788c
commit f3fd4cd591
7 changed files with 50 additions and 51 deletions

View File

@ -117,7 +117,7 @@
/*
* Software reset reg at address 0x0028
* 0: txdma_sw_reset
* 0: txdma_sw_reset
* 1: rxdma_sw_reset
* 2: txmac_sw_reset
* 3: rxmac_sw_reset
@ -1052,7 +1052,7 @@ typedef struct _RXMAC_t { /* Location: */
* 4-0: register
*/
#define MII_ADDR(phy,reg) ((phy) << 8 | (reg))
#define MII_ADDR(phy, reg) ((phy) << 8 | (reg))
/*
* structure for MII Management Control reg in mac address map.
@ -1249,8 +1249,7 @@ typedef struct _MAC_t { /* Location: */
/*
* MAC STATS Module of JAGCore Address Mapping
*/
struct macstat_regs
{ /* Location: */
struct macstat_regs { /* Location: */
u32 pad[32]; /* 0x6000 - 607C */
/* Tx/Rx 0-64 Byte Frame Counter */

View File

@ -302,7 +302,7 @@ static int eeprom_read(struct et131x_adapter *etdev, u32 addr, u8 *pdata)
err = eeprom_wait_ready(pdev, NULL);
if (err)
return err;
/*
/*
* Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0,
* and bits 1:0 both =0. Bit 5 should be set according to the type
* of EEPROM being accessed (1=two byte addressing, 0=one byte
@ -383,9 +383,9 @@ int et131x_init_eeprom(struct et131x_adapter *etdev)
/* This error could mean that there was an error
* reading the eeprom or that the eeprom doesn't exist.
* We will treat each case the same and not try to gather
* additional information that normally would come from the
* eeprom, like MAC Address
* We will treat each case the same and not try to
* gather additional information that normally would
* come from the eeprom, like MAC Address
*/
etdev->has_eeprom = 0;
return -EIO;

View File

@ -344,7 +344,7 @@ static void ET1310_PhyDuplexMode(struct et131x_adapter *etdev, u16 duplex)
static void ET1310_PhySpeedSelect(struct et131x_adapter *etdev, u16 speed)
{
u16 data;
static const u16 bits[3]={0x0000, 0x2000, 0x0040};
static const u16 bits[3] = {0x0000, 0x2000, 0x0040};
/* Read the PHY control register */
MiRead(etdev, PHY_CONTROL, &data);

View File

@ -344,7 +344,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
"Cannot alloc memory for Packet Status Ring\n");
return -ENOMEM;
}
printk("PSR %lx\n", (unsigned long) rx_ring->pPSRingPa);
printk(KERN_INFO "PSR %lx\n", (unsigned long) rx_ring->pPSRingPa);
/*
* NOTE : pci_alloc_consistent(), used above to alloc DMA regions,
@ -363,7 +363,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
return -ENOMEM;
}
rx_ring->NumRfd = NIC_DEFAULT_NUM_RFD;
printk("PRS %lx\n", (unsigned long)rx_ring->rx_status_bus);
printk(KERN_INFO "PRS %lx\n", (unsigned long)rx_ring->rx_status_bus);
/* Recv
* pci_pool_create initializes a lookaside list. After successful
@ -445,10 +445,10 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
rx_ring->pFbr1RingVa - rx_ring->Fbr1offset);
bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries)
+ 0xfff;
+ 0xfff;
pci_free_consistent(adapter->pdev, bufsize,
rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa);
rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa);
rx_ring->pFbr1RingVa = NULL;
}
@ -478,7 +478,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
rx_ring->pFbr0RingVa - rx_ring->Fbr0offset);
bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries)
+ 0xfff;
+ 0xfff;
pci_free_consistent(adapter->pdev,
bufsize,
@ -504,7 +504,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
pci_free_consistent(adapter->pdev,
sizeof(struct rx_status_block),
rx_ring->rx_status_block, rx_ring->rx_status_bus);
rx_ring->rx_status_block = NULL;
rx_ring->rx_status_block = NULL;
}
/* Free receive buffer pool */
@ -713,7 +713,7 @@ void SetRxDmaTimer(struct et131x_adapter *etdev)
*/
void et131x_rx_dma_disable(struct et131x_adapter *etdev)
{
u32 csr;
u32 csr;
/* Setup the receive dma configuration register */
writel(0x00002001, &etdev->regs->rxdma.csr);
csr = readl(&etdev->regs->rxdma.csr);
@ -743,9 +743,9 @@ void et131x_rx_dma_enable(struct et131x_adapter *etdev)
else if (etdev->rx_ring.Fbr1BufferSize == 16384)
csr |= 0x1800;
#ifdef USE_FBR0
csr |= 0x0400; /* FBR0 enable */
csr |= 0x0400; /* FBR0 enable */
if (etdev->rx_ring.Fbr0BufferSize == 256)
csr |= 0x0100;
csr |= 0x0100;
else if (etdev->rx_ring.Fbr0BufferSize == 512)
csr |= 0x0200;
else if (etdev->rx_ring.Fbr0BufferSize == 1024)
@ -757,7 +757,7 @@ void et131x_rx_dma_enable(struct et131x_adapter *etdev)
if ((csr & 0x00020000) != 0) {
udelay(5);
csr = readl(&etdev->regs->rxdma.csr);
if ((csr & 0x00020000) != 0) {
if ((csr & 0x00020000) != 0) {
dev_err(&etdev->pdev->dev,
"RX Dma failed to exit halt state. CSR 0x%08x\n",
csr);
@ -841,8 +841,7 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
(rindex == 1 &&
bindex > rx_local->Fbr1NumEntries - 1))
#else
if (rindex != 1 ||
bindex > rx_local->Fbr1NumEntries - 1)
if (rindex != 1 || bindex > rx_local->Fbr1NumEntries - 1)
#endif
{
/* Illegal buffer or ring index cannot be used by S/W*/
@ -1063,20 +1062,20 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev)
static inline u32 bump_fbr(u32 *fbr, u32 limit)
{
u32 v = *fbr;
v++;
/* This works for all cases where limit < 1024. The 1023 case
works because 1023++ is 1024 which means the if condition is not
taken but the carry of the bit into the wrap bit toggles the wrap
value correctly */
if ((v & ET_DMA10_MASK) > limit) {
v &= ~ET_DMA10_MASK;
v ^= ET_DMA10_WRAP;
}
/* For the 1023 case */
v &= (ET_DMA10_MASK|ET_DMA10_WRAP);
*fbr = v;
return v;
u32 v = *fbr;
v++;
/* This works for all cases where limit < 1024. The 1023 case
works because 1023++ is 1024 which means the if condition is not
taken but the carry of the bit into the wrap bit toggles the wrap
value correctly */
if ((v & ET_DMA10_MASK) > limit) {
v &= ~ET_DMA10_MASK;
v ^= ET_DMA10_WRAP;
}
/* For the 1023 case */
v &= (ET_DMA10_MASK|ET_DMA10_WRAP);
*fbr = v;
return v;
}
/**
@ -1105,7 +1104,7 @@ void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd)
if (ri == 1) {
struct fbr_desc *next =
(struct fbr_desc *) (rx_local->pFbr1RingVa) +
INDEX10(rx_local->local_Fbr1_full);
INDEX10(rx_local->local_Fbr1_full);
/* Handle the Free Buffer Ring advancement here. Write
* the PA / Buffer Index for the returned buffer into

View File

@ -91,8 +91,7 @@
#define ALCATEL_BROADCAST_PKT 0x02000000
/* typedefs for Free Buffer Descriptors */
struct fbr_desc
{
struct fbr_desc {
u32 addr_lo;
u32 addr_hi;
u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */
@ -117,7 +116,7 @@ struct fbr_desc
* 9: jp Jumbo Packet
* 10: vp VLAN Packet
* 11-15: unused
* 16: asw_prev_pkt_dropped e.g. IFG too small on previous
* 16: asw_prev_pkt_dropped e.g. IFG too small on previous
* 17: asw_RX_DV_event short receive event detected
* 18: asw_false_carrier_event bad carrier since last good packet
* 19: asw_code_err one or more nibbles signalled as errors

View File

@ -113,7 +113,13 @@
static u32 et131x_speed_set;
module_param(et131x_speed_set, uint, 0);
MODULE_PARM_DESC(et131x_speed_set,
"Set Link speed and dublex manually (0-5) [0] \n 1 : 10Mb Half-Duplex \n 2 : 10Mb Full-Duplex \n 3 : 100Mb Half-Duplex \n 4 : 100Mb Full-Duplex \n 5 : 1000Mb Full-Duplex \n 0 : Auto Speed Auto Dublex");
"Set Link speed and dublex manually (0-5) [0]\n \
1 : 10Mb Half-Duplex\n \
2 : 10Mb Full-Duplex\n \
3 : 100Mb Half-Duplex\n \
4 : 100Mb Full-Duplex\n \
5 : 1000Mb Full-Duplex\n \
0 : Auto Speed Auto Dublex");
/**
* et131x_hwaddr_init - set up the MAC Address on the ET1310
@ -558,7 +564,7 @@ static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev,
/* Parse configuration parameters into the private adapter struct */
if (et131x_speed_set)
dev_info(&etdev->pdev->dev,
"Speed set manually to : %d \n", et131x_speed_set);
"Speed set manually to : %d\n", et131x_speed_set);
etdev->SpeedDuplex = et131x_speed_set;
etdev->RegistryJumboPacket = 1514; /* 1514-9216 */
@ -820,7 +826,7 @@ static int __init et131x_init_module(void)
if (et131x_speed_set < PARM_SPEED_DUPLEX_MIN ||
et131x_speed_set > PARM_SPEED_DUPLEX_MAX) {
printk(KERN_WARNING "et131x: invalid speed setting ignored.\n");
et131x_speed_set = 0;
et131x_speed_set = 0;
}
return pci_register_driver(&et131x_driver);
}

View File

@ -426,26 +426,22 @@ void et131x_multicast(struct net_device *netdev)
* accordingly
*/
if (netdev->flags & IFF_PROMISC) {
if (netdev->flags & IFF_PROMISC)
adapter->PacketFilter |= ET131X_PACKET_TYPE_PROMISCUOUS;
} else {
else
adapter->PacketFilter &= ~ET131X_PACKET_TYPE_PROMISCUOUS;
}
if (netdev->flags & IFF_ALLMULTI) {
if (netdev->flags & IFF_ALLMULTI)
adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST;
}
if (netdev_mc_count(netdev) > NIC_MAX_MCAST_LIST) {
if (netdev_mc_count(netdev) > NIC_MAX_MCAST_LIST)
adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST;
}
if (netdev_mc_count(netdev) < 1) {
adapter->PacketFilter &= ~ET131X_PACKET_TYPE_ALL_MULTICAST;
adapter->PacketFilter &= ~ET131X_PACKET_TYPE_MULTICAST;
} else {
} else
adapter->PacketFilter |= ET131X_PACKET_TYPE_MULTICAST;
}
/* Set values in the private adapter struct */
i = 0;