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SuperH fixes for 3.5-rc5 

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Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh

Pull SuperH fixes from Paul Mundt.

* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh:
  sh: Convert sh_clk_mstp32_register to sh_clk_mstp_register
  sh: kfr2r09: fix compile breakage
This commit is contained in:
Linus Torvalds 2012-06-28 11:22:25 -07:00
parent f3747e2f2c e9bcd470d8
commit ef726227e7
12 changed files with 13 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/sh/boards/mach-kfr2r09/setup.c
View File

@ -201,8 +201,8 @@ static struct resource kfr2r09_usb0_gadget_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evtirq(0xa20),
.end = evtirq(0xa20),
.start = evt2irq(0xa20),
.end = evt2irq(0xa20),
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
},
};

2
arch/sh/drivers/pci/pcie-sh7786.c
View File

@ -239,7 +239,7 @@ static int __init pcie_clk_init(struct sh7786_pcie_port *port)
clk->enable_reg = (void __iomem *)(chan->reg_base + SH4A_PCIEPHYCTLR);
clk->enable_bit = BITS_CKE;
ret = sh_clk_mstp32_register(clk, 1);
ret = sh_clk_mstp_register(clk, 1);
if (unlikely(ret < 0))
goto err_phy;

2
arch/sh/kernel/cpu/sh4a/clock-sh7343.c
View File

@ -283,7 +283,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-sh7366.c
View File

@ -276,7 +276,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
View File

@ -261,7 +261,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR);
ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
View File

@ -311,7 +311,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR);
ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
View File

@ -375,7 +375,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR);
ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-sh7734.c
View File

@ -260,7 +260,7 @@ int __init arch_clk_init(void)
&div4_table);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-sh7757.c
View File

@ -148,7 +148,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
&div4_table);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-sh7785.c
View File

@ -175,7 +175,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
&div4_table);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-sh7786.c
View File

@ -194,7 +194,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
&div4_table);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
return ret;
}

2
arch/sh/kernel/cpu/sh4a/clock-shx3.c
View File

@ -149,7 +149,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
&div4_table);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
return ret;
}