Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf: Fix throttle logic perf, x86: P4 PMU: Fix spurious NMI messages
This commit is contained in:
commit
ee88347755
3 changed files with 24 additions and 7 deletions
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@ -22,6 +22,7 @@
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#define ARCH_P4_CNTRVAL_BITS (40)
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#define ARCH_P4_CNTRVAL_BITS (40)
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#define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
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#define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
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#define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1))
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#define P4_ESCR_EVENT_MASK 0x7e000000U
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#define P4_ESCR_EVENT_MASK 0x7e000000U
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#define P4_ESCR_EVENT_SHIFT 25
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#define P4_ESCR_EVENT_SHIFT 25
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@ -770,9 +770,14 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
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return 1;
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return 1;
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}
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}
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/* it might be unflagged overflow */
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/*
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rdmsrl(hwc->event_base + hwc->idx, v);
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* In some circumstances the overflow might issue an NMI but did
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if (!(v & ARCH_P4_CNTRVAL_MASK))
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* not set P4_CCCR_OVF bit. Because a counter holds a negative value
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* we simply check for high bit being set, if it's cleared it means
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* the counter has reached zero value and continued counting before
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* real NMI signal was received:
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*/
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if (!(v & ARCH_P4_UNFLAGGED_BIT))
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return 1;
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return 1;
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return 0;
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return 0;
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@ -782,6 +782,10 @@ retry:
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raw_spin_unlock_irq(&ctx->lock);
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raw_spin_unlock_irq(&ctx->lock);
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}
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}
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#define MAX_INTERRUPTS (~0ULL)
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static void perf_log_throttle(struct perf_event *event, int enable);
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static int
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static int
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event_sched_in(struct perf_event *event,
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event_sched_in(struct perf_event *event,
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struct perf_cpu_context *cpuctx,
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struct perf_cpu_context *cpuctx,
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@ -794,6 +798,17 @@ event_sched_in(struct perf_event *event,
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event->state = PERF_EVENT_STATE_ACTIVE;
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event->state = PERF_EVENT_STATE_ACTIVE;
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event->oncpu = smp_processor_id();
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event->oncpu = smp_processor_id();
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/*
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* Unthrottle events, since we scheduled we might have missed several
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* ticks already, also for a heavily scheduling task there is little
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* guarantee it'll get a tick in a timely manner.
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*/
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if (unlikely(event->hw.interrupts == MAX_INTERRUPTS)) {
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perf_log_throttle(event, 1);
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event->hw.interrupts = 0;
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}
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/*
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/*
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* The new state must be visible before we turn it on in the hardware:
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* The new state must be visible before we turn it on in the hardware:
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*/
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*/
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@ -1596,10 +1611,6 @@ void __perf_event_task_sched_in(struct task_struct *task)
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}
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}
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}
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}
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#define MAX_INTERRUPTS (~0ULL)
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static void perf_log_throttle(struct perf_event *event, int enable);
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static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count)
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static u64 perf_calculate_period(struct perf_event *event, u64 nsec, u64 count)
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{
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{
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u64 frequency = event->attr.sample_freq;
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u64 frequency = event->attr.sample_freq;
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