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pata_it8213: fix PIO2 underclocking

[ port of Sergei's fixes for pata_efar from commit 5f33b3b ]

Fix the PIO mode 2 using mode 0 timings -- this driver should enable the
fast timing bank starting with PIO2, just like the PIIX/ICH drivers do.
Also, fix/rephrase some comments while at it.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz 2009-12-03 20:32:10 +01:00 committed by Jeff Garzik
parent 088ccb53a3
commit ed869ff0c7

View file

@ -92,18 +92,17 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
{ 2, 1 }, { 2, 1 },
{ 2, 3 }, }; { 2, 3 }, };
if (pio > 2) if (pio > 1)
control |= 1; /* TIME1 enable */ control |= 1; /* TIME */
if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */
control |= 2; /* IORDY enable */ control |= 2; /* IE */
/* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */ /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
if (adev->class != ATA_DEV_ATA) if (adev->class != ATA_DEV_ATA)
control |= 4; control |= 4; /* PPE */
pci_read_config_word(dev, idetm_port, &idetm_data); pci_read_config_word(dev, idetm_port, &idetm_data);
/* Enable PPE, IE and TIME as appropriate */ /* Set PPE, IE, and TIME as appropriate */
if (adev->devno == 0) { if (adev->devno == 0) {
idetm_data &= 0xCCF0; idetm_data &= 0xCCF0;
idetm_data |= control; idetm_data |= control;
@ -122,7 +121,7 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
pci_write_config_byte(dev, 0x44, slave_data); pci_write_config_byte(dev, 0x44, slave_data);
} }
idetm_data |= 0x4000; /* Ensure SITRE is enabled */ idetm_data |= 0x4000; /* Ensure SITRE is set */
pci_write_config_word(dev, idetm_port, idetm_data); pci_write_config_word(dev, idetm_port, idetm_data);
} }