ASoC: Ensure WM8731 register cache is synced when resuming from disabled
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org
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@ -453,6 +453,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
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snd_soc_write(codec, WM8731_PWR, 0xffff);
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regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
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wm8731->supplies);
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codec->cache_sync = 1;
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break;
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}
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codec->dapm.bias_level = level;
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