[PATCH] ARM SMP: Add support for startup of secondary processors
Create a temporary page table to startup secondary processors. This page table must have a 1:1 virtual/physical mapping for the kernel in addition to the standard mappings to ensure that the secondary CPU can enable its MMU safely. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
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5ab6091db0
commit
e65f38ed0b
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@ -2,6 +2,8 @@
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* linux/arch/arm/kernel/head.S
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*
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* Copyright (C) 1994-2002 Russell King
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* Copyright (c) 2003 ARM Limited
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -165,6 +167,48 @@ __mmap_switched:
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stmia r6, {r0, r4} @ Save control register values
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b start_kernel
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#if defined(CONFIG_SMP)
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.type secondary_startup, #function
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ENTRY(secondary_startup)
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/*
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* Common entry point for secondary CPUs.
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*
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* Ensure that we're in SVC mode, and IRQs are disabled. Lookup
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* the processor type - there is no need to check the machine type
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* as it has already been validated by the primary processor.
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*/
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msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC
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bl __lookup_processor_type
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movs r10, r5 @ invalid processor?
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moveq r0, #'p' @ yes, error 'p'
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beq __error
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/*
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* Use the page tables supplied from __cpu_up.
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*/
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adr r4, __secondary_data
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ldmia r4, {r5, r6, r13} @ address to jump to after
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sub r4, r4, r5 @ mmu has been enabled
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ldr r4, [r6, r4] @ get secondary_data.pgdir
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adr lr, __enable_mmu @ return address
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add pc, r10, #12 @ initialise processor
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@ (return control reg)
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/*
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* r6 = &secondary_data
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*/
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ENTRY(__secondary_switched)
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ldr sp, [r6, #4] @ get secondary_data.stack
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mov fp, #0
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b secondary_start_kernel
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.type __secondary_data, %object
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__secondary_data:
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.long .
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.long secondary_data
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.long __secondary_switched
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#endif /* defined(CONFIG_SMP) */
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/*
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@ -24,6 +24,9 @@
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#include <asm/atomic.h>
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#include <asm/cacheflush.h>
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#include <asm/cpu.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/processor.h>
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#include <asm/tlbflush.h>
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#include <asm/ptrace.h>
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@ -36,6 +39,13 @@
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cpumask_t cpu_present_mask;
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cpumask_t cpu_online_map;
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/*
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* as from 2.5, kernels no longer have an init_tasks structure
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* so we need some other way of telling a new secondary core
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* where to place its SVC stack
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*/
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struct secondary_data secondary_data;
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/*
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* structures for inter-processor calls
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* - A collection of single bit ipi messages.
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@ -71,6 +81,8 @@ static DEFINE_SPINLOCK(smp_call_function_lock);
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int __init __cpu_up(unsigned int cpu)
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{
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struct task_struct *idle;
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pgd_t *pgd;
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pmd_t *pmd;
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int ret;
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/*
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@ -83,10 +95,55 @@ int __init __cpu_up(unsigned int cpu)
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return PTR_ERR(idle);
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}
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/*
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* Allocate initial page tables to allow the new CPU to
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* enable the MMU safely. This essentially means a set
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* of our "standard" page tables, with the addition of
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* a 1:1 mapping for the physical address of the kernel.
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*/
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pgd = pgd_alloc(&init_mm);
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pmd = pmd_offset(pgd, PHYS_OFFSET);
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*pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) |
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PMD_TYPE_SECT | PMD_SECT_AP_WRITE);
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/*
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* We need to tell the secondary core where to find
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* its stack and the page tables.
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*/
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secondary_data.stack = (void *)idle->thread_info + THREAD_SIZE - 8;
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secondary_data.pgdir = virt_to_phys(pgd);
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wmb();
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/*
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* Now bring the CPU into our world.
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*/
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ret = boot_secondary(cpu, idle);
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if (ret == 0) {
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unsigned long timeout;
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/*
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* CPU was successfully started, wait for it
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* to come online or time out.
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*/
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timeout = jiffies + HZ;
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while (time_before(jiffies, timeout)) {
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if (cpu_online(cpu))
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break;
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udelay(10);
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barrier();
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}
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if (!cpu_online(cpu))
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ret = -EIO;
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}
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secondary_data.stack = 0;
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secondary_data.pgdir = 0;
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*pmd_offset(pgd, PHYS_OFFSET) = __pmd(0);
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pgd_free(pgd);
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if (ret) {
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printk(KERN_CRIT "cpu_up: processor %d failed to boot\n", cpu);
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/*
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@ -97,6 +154,56 @@ int __init __cpu_up(unsigned int cpu)
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return ret;
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}
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/*
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* This is the secondary CPU boot entry. We're using this CPUs
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* idle thread stack, but a set of temporary page tables.
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*/
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asmlinkage void __init secondary_start_kernel(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu = smp_processor_id();
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printk("CPU%u: Booted secondary processor\n", cpu);
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/*
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* All kernel threads share the same mm context; grab a
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* reference and switch to it.
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*/
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atomic_inc(&mm->mm_users);
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atomic_inc(&mm->mm_count);
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current->active_mm = mm;
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cpu_set(cpu, mm->cpu_vm_mask);
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cpu_switch_mm(mm->pgd, mm);
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enter_lazy_tlb(mm, current);
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cpu_init();
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/*
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* Give the platform a chance to do its own initialisation.
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*/
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platform_secondary_init(cpu);
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/*
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* Enable local interrupts.
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*/
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local_irq_enable();
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local_fiq_enable();
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calibrate_delay();
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smp_store_cpu_info(cpu);
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/*
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* OK, now it's safe to let the boot CPU continue
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*/
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cpu_set(cpu, cpu_online_map);
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/*
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* OK, it's off to the idle thread for us
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*/
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cpu_idle();
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}
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/*
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* Called by both boot and secondaries to move global data into
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* per-processor storage.
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@ -55,4 +55,18 @@ extern void smp_cross_call(cpumask_t callmap);
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*/
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extern int boot_secondary(unsigned int cpu, struct task_struct *);
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/*
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* Perform platform specific initialisation of the specified CPU.
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*/
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extern void platform_secondary_init(unsigned int cpu);
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/*
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* Initial data for bringing up a secondary CPU.
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*/
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struct secondary_data {
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unsigned long pgdir;
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void *stack;
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};
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extern struct secondary_data secondary_data;
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#endif /* ifndef __ASM_ARM_SMP_H */
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