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spi/dw_spi: clean the cs_control code 

commit 052dc7c45i "spi/dw_spi: conditional transfer mode change"
introduced cs_control code, which has a bug by using bit offset
for spi mode to set transfer mode in control register. Also it
forces devices who don't need cs_control to re-configure the
control registers for each spi transfer. This patch will fix them

Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Feng Tang 2010-09-07 15:52:06 +08:00 committed by Grant Likely
parent cbcc062abb
commit e3e55ff585
2 changed files with 7 additions and 12 deletions
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17
drivers/spi/dw_spi.c
View File

@ -181,10 +181,6 @@ static void flush(struct dw_spi *dws)
wait_till_not_busy(dws);
}
static void null_cs_control(u32 command)
{
}
static int null_writer(struct dw_spi *dws)
{
u8 n_bytes = dws->n_bytes;
@ -322,7 +318,7 @@ static void giveback(struct dw_spi *dws)
struct spi_transfer,
transfer_list);
if (!last_transfer->cs_change)
if (!last_transfer->cs_change && dws->cs_control)
dws->cs_control(MRST_SPI_DEASSERT);
msg->state = NULL;
@ -549,13 +545,13 @@ static void pump_transfers(unsigned long data)
*/
if (dws->cs_control) {
if (dws->rx && dws->tx)
chip->tmode = 0x00;
chip->tmode = SPI_TMOD_TR;
else if (dws->rx)
chip->tmode = 0x02;
chip->tmode = SPI_TMOD_RO;
else
chip->tmode = 0x01;
chip->tmode = SPI_TMOD_TO;
cr0 &= ~(0x3 << SPI_MODE_OFFSET);
cr0 &= ~SPI_TMOD_MASK;
cr0 |= (chip->tmode << SPI_TMOD_OFFSET);
}
@ -704,9 +700,6 @@ static int dw_spi_setup(struct spi_device *spi)
chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
if (!chip)
return -ENOMEM;
chip->cs_control = null_cs_control;
chip->enable_dma = 0;
}
/*

2
include/linux/spi/dw_spi.h
View File

@ -14,7 +14,9 @@
#define SPI_MODE_OFFSET 6
#define SPI_SCPH_OFFSET 6
#define SPI_SCOL_OFFSET 7
#define SPI_TMOD_OFFSET 8
#define SPI_TMOD_MASK (0x3 << SPI_TMOD_OFFSET)
#define SPI_TMOD_TR 0x0 /* xmit & recv */
#define SPI_TMOD_TO 0x1 /* xmit only */
#define SPI_TMOD_RO 0x2 /* recv only */