davinci: DM646x: add base SoC and board support
Add support for DM646x SoC (a.k.a DaVinci HD) and its Evalution Module (EVM.) Original support done by Sudhakar Rajashekhara. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Kevin Hilman
parent
95a3477fe5
commit
e38d92fdcd
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@ -13,6 +13,9 @@ config ARCH_DAVINCI_DM644x
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config ARCH_DAVINCI_DM355
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bool "DaVinci 355 based system"
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config ARCH_DAVINCI_DM646x
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bool "DaVinci 646x based system"
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comment "DaVinci Board Type"
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config MACH_DAVINCI_EVM
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@ -47,6 +50,15 @@ config MACH_DM355_LEOPARD
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Configure this option to specify the whether the board used
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for development is a DM355 Leopard board.
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config MACH_DAVINCI_DM6467_EVM
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bool "TI DM6467 EVM"
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default n
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depends on ARCH_DAVINCI_DM646x
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help
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Configure this option to specify the whether the board used
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for development is a DM6467 EVM
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config DAVINCI_MUX
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bool "DAVINCI multiplexing support"
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depends on ARCH_DAVINCI
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@ -13,9 +13,11 @@ obj-$(CONFIG_CP_INTC) += cp_intc.o
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# Chip specific
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obj-$(CONFIG_ARCH_DAVINCI_DM644x) += dm644x.o
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obj-$(CONFIG_ARCH_DAVINCI_DM355) += dm355.o
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obj-$(CONFIG_ARCH_DAVINCI_DM646x) += dm646x.o
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# Board specific
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obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o
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obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o
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obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o
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obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o
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obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o
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@ -0,0 +1,280 @@
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/*
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* TI DaVinci DM646X EVM board
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*
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* Derived from: arch/arm/mach-davinci/board-evm.c
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* Copyright (C) 2006 Texas Instruments.
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*
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* (C) 2007-2008, MontaVista Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*
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*/
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/**************************************************************************
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* Included Files
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**************************************************************************/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/major.h>
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#include <linux/root_dev.h>
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#include <linux/dma-mapping.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/leds.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c/at24.h>
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#include <linux/i2c/pcf857x.h>
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#include <linux/etherdevice.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/flash.h>
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#include <mach/dm646x.h>
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#include <mach/common.h>
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#include <mach/psc.h>
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#include <mach/serial.h>
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#include <mach/i2c.h>
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static struct davinci_uart_config uart_config __initdata = {
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.enabled_uarts = (1 << 0),
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};
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/* LEDS */
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static struct gpio_led evm_leds[] = {
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{ .name = "DS1", .active_low = 1, },
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{ .name = "DS2", .active_low = 1, },
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{ .name = "DS3", .active_low = 1, },
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{ .name = "DS4", .active_low = 1, },
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};
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static __initconst struct gpio_led_platform_data evm_led_data = {
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.num_leds = ARRAY_SIZE(evm_leds),
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.leds = evm_leds,
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};
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static struct platform_device *evm_led_dev;
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static int evm_led_setup(struct i2c_client *client, int gpio,
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unsigned int ngpio, void *c)
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{
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struct gpio_led *leds = evm_leds;
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int status;
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while (ngpio--) {
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leds->gpio = gpio++;
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leds++;
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};
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evm_led_dev = platform_device_alloc("leds-gpio", 0);
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platform_device_add_data(evm_led_dev, &evm_led_data,
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sizeof(evm_led_data));
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evm_led_dev->dev.parent = &client->dev;
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status = platform_device_add(evm_led_dev);
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if (status < 0) {
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platform_device_put(evm_led_dev);
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evm_led_dev = NULL;
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}
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return status;
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}
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static int evm_led_teardown(struct i2c_client *client, int gpio,
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unsigned ngpio, void *c)
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{
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if (evm_led_dev) {
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platform_device_unregister(evm_led_dev);
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evm_led_dev = NULL;
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}
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return 0;
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}
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static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
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static int evm_sw_setup(struct i2c_client *client, int gpio,
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unsigned ngpio, void *c)
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{
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int status;
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int i;
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char label[10];
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for (i = 0; i < 4; ++i) {
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snprintf(label, 10, "user_sw%d", i);
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status = gpio_request(gpio, label);
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if (status)
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goto out_free;
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evm_sw_gpio[i] = gpio++;
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status = gpio_direction_input(evm_sw_gpio[i]);
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if (status) {
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gpio_free(evm_sw_gpio[i]);
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evm_sw_gpio[i] = -EINVAL;
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goto out_free;
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}
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status = gpio_export(evm_sw_gpio[i], 0);
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if (status) {
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gpio_free(evm_sw_gpio[i]);
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evm_sw_gpio[i] = -EINVAL;
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goto out_free;
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}
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}
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return status;
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out_free:
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for (i = 0; i < 4; ++i) {
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if (evm_sw_gpio[i] != -EINVAL) {
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gpio_free(evm_sw_gpio[i]);
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evm_sw_gpio[i] = -EINVAL;
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}
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}
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return status;
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}
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static int evm_sw_teardown(struct i2c_client *client, int gpio,
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unsigned ngpio, void *c)
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{
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int i;
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for (i = 0; i < 4; ++i) {
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if (evm_sw_gpio[i] != -EINVAL) {
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gpio_unexport(evm_sw_gpio[i]);
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gpio_free(evm_sw_gpio[i]);
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evm_sw_gpio[i] = -EINVAL;
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}
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}
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return 0;
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}
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static int evm_pcf_setup(struct i2c_client *client, int gpio,
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unsigned int ngpio, void *c)
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{
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int status;
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if (ngpio < 8)
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return -EINVAL;
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status = evm_sw_setup(client, gpio, 4, c);
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if (status)
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return status;
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return evm_led_setup(client, gpio+4, 4, c);
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}
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static int evm_pcf_teardown(struct i2c_client *client, int gpio,
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unsigned int ngpio, void *c)
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{
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BUG_ON(ngpio < 8);
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evm_sw_teardown(client, gpio, 4, c);
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evm_led_teardown(client, gpio+4, 4, c);
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return 0;
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}
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static struct pcf857x_platform_data pcf_data = {
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.gpio_base = DAVINCI_N_GPIO+1,
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.setup = evm_pcf_setup,
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.teardown = evm_pcf_teardown,
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};
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/* Most of this EEPROM is unused, but U-Boot uses some data:
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* - 0x7f00, 6 bytes Ethernet Address
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* - ... newer boards may have more
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*/
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static struct memory_accessor *at24_mem_acc;
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static void at24_setup(struct memory_accessor *mem_acc, void *context)
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{
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char mac_addr[6];
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at24_mem_acc = mem_acc;
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/* Read MAC addr from EEPROM */
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if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x7f00, ETH_ALEN) ==
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ETH_ALEN)
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pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr);
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}
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static struct at24_platform_data eeprom_info = {
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.byte_len = (256*1024) / 8,
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.page_size = 64,
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.flags = AT24_FLAG_ADDR16,
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.setup = at24_setup,
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};
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int dm646xevm_eeprom_read(void *buf, off_t off, size_t count)
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{
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if (at24_mem_acc)
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return at24_mem_acc->read(at24_mem_acc, buf, off, count);
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return -ENODEV;
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}
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EXPORT_SYMBOL(dm646xevm_eeprom_read);
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int dm646xevm_eeprom_write(void *buf, off_t off, size_t count)
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{
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if (at24_mem_acc)
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return at24_mem_acc->write(at24_mem_acc, buf, off, count);
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return -ENODEV;
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}
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EXPORT_SYMBOL(dm646xevm_eeprom_write);
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static struct i2c_board_info __initdata i2c_info[] = {
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{
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I2C_BOARD_INFO("24c256", 0x50),
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.platform_data = &eeprom_info,
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},
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{
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I2C_BOARD_INFO("pcf8574a", 0x38),
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.platform_data = &pcf_data,
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},
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};
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static struct davinci_i2c_platform_data i2c_pdata = {
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.bus_freq = 100 /* kHz */,
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.bus_delay = 0 /* usec */,
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};
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static void __init evm_init_i2c(void)
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{
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davinci_init_i2c(&i2c_pdata);
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i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
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}
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static void __init davinci_map_io(void)
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{
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davinci_map_common_io();
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dm646x_init();
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}
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static __init void evm_init(void)
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{
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evm_init_i2c();
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davinci_serial_init(&uart_config);
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}
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static __init void davinci_dm646x_evm_irq_init(void)
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{
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davinci_irq_init();
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}
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MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
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.phys_io = IO_PHYS,
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.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
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.boot_params = (0x80000100),
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.map_io = davinci_map_io,
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.init_irq = davinci_dm646x_evm_irq_init,
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.timer = &davinci_timer,
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.init_machine = evm_init,
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MACHINE_END
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@ -0,0 +1,402 @@
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/*
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* TI DaVinci DM644x chip specific setup
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*
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* Author: Kevin Hilman, Deep Root Systems, LLC
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*
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* 2007 (c) Deep Root Systems, LLC. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <mach/dm646x.h>
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#include <mach/clock.h>
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#include <mach/cputype.h>
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#include <mach/edma.h>
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#include <mach/irqs.h>
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#include <mach/psc.h>
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#include <mach/mux.h>
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#include "clock.h"
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#include "mux.h"
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/*
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* Device specific clocks
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*/
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#define DM646X_REF_FREQ 27000000
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#define DM646X_AUX_FREQ 24000000
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static struct pll_data pll1_data = {
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.num = 1,
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.phys_base = DAVINCI_PLL1_BASE,
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};
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static struct pll_data pll2_data = {
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.num = 2,
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.phys_base = DAVINCI_PLL2_BASE,
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};
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static struct clk ref_clk = {
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.name = "ref_clk",
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.rate = DM646X_REF_FREQ,
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};
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static struct clk aux_clkin = {
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.name = "aux_clkin",
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.rate = DM646X_AUX_FREQ,
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};
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static struct clk pll1_clk = {
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.name = "pll1",
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.parent = &ref_clk,
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.pll_data = &pll1_data,
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.flags = CLK_PLL,
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};
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static struct clk pll1_sysclk1 = {
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.name = "pll1_sysclk1",
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.parent = &pll1_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV1,
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};
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static struct clk pll1_sysclk2 = {
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.name = "pll1_sysclk2",
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.parent = &pll1_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV2,
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};
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static struct clk pll1_sysclk3 = {
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.name = "pll1_sysclk3",
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.parent = &pll1_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV3,
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};
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static struct clk pll1_sysclk4 = {
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.name = "pll1_sysclk4",
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.parent = &pll1_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV4,
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};
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static struct clk pll1_sysclk5 = {
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.name = "pll1_sysclk5",
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.parent = &pll1_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV5,
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};
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static struct clk pll1_sysclk6 = {
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.name = "pll1_sysclk6",
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.parent = &pll1_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV6,
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};
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static struct clk pll1_sysclk8 = {
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.name = "pll1_sysclk8",
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.parent = &pll1_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV8,
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};
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static struct clk pll1_sysclk9 = {
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.name = "pll1_sysclk9",
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.parent = &pll1_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV9,
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};
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static struct clk pll1_sysclkbp = {
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.name = "pll1_sysclkbp",
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.parent = &pll1_clk,
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.flags = CLK_PLL | PRE_PLL,
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.div_reg = BPDIV,
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};
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static struct clk pll1_aux_clk = {
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.name = "pll1_aux_clk",
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.parent = &pll1_clk,
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.flags = CLK_PLL | PRE_PLL,
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};
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static struct clk pll2_clk = {
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.name = "pll2_clk",
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.parent = &ref_clk,
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.pll_data = &pll2_data,
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.flags = CLK_PLL,
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};
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static struct clk pll2_sysclk1 = {
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.name = "pll2_sysclk1",
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.parent = &pll2_clk,
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.flags = CLK_PLL,
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.div_reg = PLLDIV1,
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};
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static struct clk dsp_clk = {
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.name = "dsp",
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.parent = &pll1_sysclk1,
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.lpsc = DM646X_LPSC_C64X_CPU,
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.flags = PSC_DSP,
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.usecount = 1, /* REVISIT how to disable? */
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};
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static struct clk arm_clk = {
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.name = "arm",
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.parent = &pll1_sysclk2,
|
||||
.lpsc = DM646X_LPSC_ARM,
|
||||
.flags = ALWAYS_ENABLED,
|
||||
};
|
||||
|
||||
static struct clk uart0_clk = {
|
||||
.name = "uart0",
|
||||
.parent = &aux_clkin,
|
||||
.lpsc = DM646X_LPSC_UART0,
|
||||
};
|
||||
|
||||
static struct clk uart1_clk = {
|
||||
.name = "uart1",
|
||||
.parent = &aux_clkin,
|
||||
.lpsc = DM646X_LPSC_UART1,
|
||||
};
|
||||
|
||||
static struct clk uart2_clk = {
|
||||
.name = "uart2",
|
||||
.parent = &aux_clkin,
|
||||
.lpsc = DM646X_LPSC_UART2,
|
||||
};
|
||||
|
||||
static struct clk i2c_clk = {
|
||||
.name = "I2CCLK",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DM646X_LPSC_I2C,
|
||||
};
|
||||
|
||||
static struct clk gpio_clk = {
|
||||
.name = "gpio",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DM646X_LPSC_GPIO,
|
||||
};
|
||||
|
||||
static struct clk aemif_clk = {
|
||||
.name = "aemif",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DM646X_LPSC_AEMIF,
|
||||
.flags = ALWAYS_ENABLED,
|
||||
};
|
||||
|
||||
static struct clk emac_clk = {
|
||||
.name = "emac",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DM646X_LPSC_EMAC,
|
||||
};
|
||||
|
||||
static struct clk pwm0_clk = {
|
||||
.name = "pwm0",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DM646X_LPSC_PWM0,
|
||||
.usecount = 1, /* REVIST: disabling hangs system */
|
||||
};
|
||||
|
||||
static struct clk pwm1_clk = {
|
||||
.name = "pwm1",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DM646X_LPSC_PWM1,
|
||||
.usecount = 1, /* REVIST: disabling hangs system */
|
||||
};
|
||||
|
||||
static struct clk timer0_clk = {
|
||||
.name = "timer0",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DM646X_LPSC_TIMER0,
|
||||
};
|
||||
|
||||
static struct clk timer1_clk = {
|
||||
.name = "timer1",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DM646X_LPSC_TIMER1,
|
||||
};
|
||||
|
||||
static struct clk timer2_clk = {
|
||||
.name = "timer2",
|
||||
.parent = &pll1_sysclk3,
|
||||
.flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */
|
||||
};
|
||||
|
||||
static struct clk vpif0_clk = {
|
||||
.name = "vpif0",
|
||||
.parent = &ref_clk,
|
||||
.lpsc = DM646X_LPSC_VPSSMSTR,
|
||||
.flags = ALWAYS_ENABLED,
|
||||
};
|
||||
|
||||
static struct clk vpif1_clk = {
|
||||
.name = "vpif1",
|
||||
.parent = &ref_clk,
|
||||
.lpsc = DM646X_LPSC_VPSSSLV,
|
||||
.flags = ALWAYS_ENABLED,
|
||||
};
|
||||
|
||||
struct davinci_clk dm646x_clks[] = {
|
||||
CLK(NULL, "ref", &ref_clk),
|
||||
CLK(NULL, "aux", &aux_clkin),
|
||||
CLK(NULL, "pll1", &pll1_clk),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclk1),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclk2),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclk3),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclk4),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclk5),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclk6),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclk8),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclk9),
|
||||
CLK(NULL, "pll1_sysclk", &pll1_sysclkbp),
|
||||
CLK(NULL, "pll1_aux", &pll1_aux_clk),
|
||||
CLK(NULL, "pll2", &pll2_clk),
|
||||
CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
|
||||
CLK(NULL, "dsp", &dsp_clk),
|
||||
CLK(NULL, "arm", &arm_clk),
|
||||
CLK(NULL, "uart0", &uart0_clk),
|
||||
CLK(NULL, "uart1", &uart1_clk),
|
||||
CLK(NULL, "uart2", &uart2_clk),
|
||||
CLK("i2c_davinci.1", NULL, &i2c_clk),
|
||||
CLK(NULL, "gpio", &gpio_clk),
|
||||
CLK(NULL, "aemif", &aemif_clk),
|
||||
CLK("davinci_emac.1", NULL, &emac_clk),
|
||||
CLK(NULL, "pwm0", &pwm0_clk),
|
||||
CLK(NULL, "pwm1", &pwm1_clk),
|
||||
CLK(NULL, "timer0", &timer0_clk),
|
||||
CLK(NULL, "timer1", &timer1_clk),
|
||||
CLK("watchdog", NULL, &timer2_clk),
|
||||
CLK(NULL, "vpif0", &vpif0_clk),
|
||||
CLK(NULL, "vpif1", &vpif1_clk),
|
||||
CLK(NULL, NULL, NULL),
|
||||
};
|
||||
|
||||
/*
|
||||
* Device specific mux setup
|
||||
*
|
||||
* soc description mux mode mode mux dbg
|
||||
* reg offset mask mode
|
||||
*/
|
||||
static const struct mux_config dm646x_pins[] = {
|
||||
MUX_CFG(DM646X, ATAEN, 0, 0, 1, 1, true)
|
||||
|
||||
MUX_CFG(DM646X, AUDCK1, 0, 29, 1, 0, false)
|
||||
|
||||
MUX_CFG(DM646X, AUDCK0, 0, 28, 1, 0, false)
|
||||
|
||||
MUX_CFG(DM646X, CRGMUX, 0, 24, 7, 5, true)
|
||||
|
||||
MUX_CFG(DM646X, STSOMUX_DISABLE, 0, 22, 3, 0, true)
|
||||
|
||||
MUX_CFG(DM646X, STSIMUX_DISABLE, 0, 20, 3, 0, true)
|
||||
|
||||
MUX_CFG(DM646X, PTSOMUX_DISABLE, 0, 18, 3, 0, true)
|
||||
|
||||
MUX_CFG(DM646X, PTSIMUX_DISABLE, 0, 16, 3, 0, true)
|
||||
|
||||
MUX_CFG(DM646X, STSOMUX, 0, 22, 3, 2, true)
|
||||
|
||||
MUX_CFG(DM646X, STSIMUX, 0, 20, 3, 2, true)
|
||||
|
||||
MUX_CFG(DM646X, PTSOMUX_PARALLEL, 0, 18, 3, 2, true)
|
||||
|
||||
MUX_CFG(DM646X, PTSIMUX_PARALLEL, 0, 16, 3, 2, true)
|
||||
|
||||
MUX_CFG(DM646X, PTSOMUX_SERIAL, 0, 18, 3, 3, true)
|
||||
|
||||
MUX_CFG(DM646X, PTSIMUX_SERIAL, 0, 16, 3, 3, true)
|
||||
};
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
||||
static const s8 dma_chan_dm646x_no_event[] = {
|
||||
0, 1, 2, 3, 13,
|
||||
14, 15, 24, 25, 26,
|
||||
27, 30, 31, 54, 55,
|
||||
56,
|
||||
-1
|
||||
};
|
||||
|
||||
static struct edma_soc_info dm646x_edma_info = {
|
||||
.n_channel = 64,
|
||||
.n_region = 6, /* 0-1, 4-7 */
|
||||
.n_slot = 512,
|
||||
.n_tc = 4,
|
||||
.noevent = dma_chan_dm646x_no_event,
|
||||
};
|
||||
|
||||
static struct resource edma_resources[] = {
|
||||
{
|
||||
.name = "edma_cc",
|
||||
.start = 0x01c00000,
|
||||
.end = 0x01c00000 + SZ_64K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "edma_tc0",
|
||||
.start = 0x01c10000,
|
||||
.end = 0x01c10000 + SZ_1K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "edma_tc1",
|
||||
.start = 0x01c10400,
|
||||
.end = 0x01c10400 + SZ_1K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "edma_tc2",
|
||||
.start = 0x01c10800,
|
||||
.end = 0x01c10800 + SZ_1K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "edma_tc3",
|
||||
.start = 0x01c10c00,
|
||||
.end = 0x01c10c00 + SZ_1K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_CCINT0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_CCERRINT,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
/* not using TC*_ERR */
|
||||
};
|
||||
|
||||
static struct platform_device dm646x_edma_device = {
|
||||
.name = "edma",
|
||||
.id = -1,
|
||||
.dev.platform_data = &dm646x_edma_info,
|
||||
.num_resources = ARRAY_SIZE(edma_resources),
|
||||
.resource = edma_resources,
|
||||
};
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
||||
void __init dm646x_init(void)
|
||||
{
|
||||
davinci_clk_init(dm646x_clks);
|
||||
davinci_mux_register(dm646x_pins, ARRAY_SIZE(dm646x_pins));
|
||||
}
|
||||
|
||||
static int __init dm646x_init_devices(void)
|
||||
{
|
||||
if (!cpu_is_davinci_dm646x())
|
||||
return 0;
|
||||
|
||||
platform_device_register(&dm646x_edma_device);
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(dm646x_init_devices);
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* Chip specific defines for DM646x SoC
|
||||
*
|
||||
* Author: Kevin Hilman, Deep Root Systems, LLC
|
||||
*
|
||||
* 2007 (c) Deep Root Systems, LLC. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*/
|
||||
#ifndef __ASM_ARCH_DM646X_H
|
||||
#define __ASM_ARCH_DM646X_H
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
void __init dm646x_init(void);
|
||||
|
||||
#endif /* __ASM_ARCH_DM646X_H */
|
||||
Reference in New Issue